Searched refs:asid (Results 1 - 25 of 124) sorted by relevance

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/linux-master/arch/sh/include/asm/
H A Dmmu_context_32.h6 static inline void set_asid(unsigned long asid) argument
8 __raw_writel(asid, MMU_PTEAEX);
16 static inline void set_asid(unsigned long asid) argument
25 : "r" (asid), "m" (__m(MMU_PTEH)),
31 unsigned long asid; local
34 : "=r" (asid)
36 asid &= MMU_CONTEXT_ASID_MASK;
37 return asid;
H A Dtlbflush.h23 extern void local_flush_tlb_one(unsigned long asid, unsigned long page);
35 extern void flush_tlb_one(unsigned long asid, unsigned long page);
42 #define flush_tlb_one(asid, page) local_flush_tlb_one(asid, page)
H A Dmmu_context.h57 unsigned long asid = asid_cache(cpu); local
60 if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0)
65 if (!(++asid & MMU_CONTEXT_ASID_MASK)) {
76 if (!asid)
77 asid = MMU_CONTEXT_FIRST_VERSION;
80 cpu_context(cpu, mm) = asid_cache(cpu) = asid;
128 #define set_asid(asid) do { } while (0)
131 #define switch_and_save_asid(asid) (0)
/linux-master/arch/csky/include/asm/
H A Dmmu.h7 atomic64_t asid; member in struct:__anon1
H A Dmmu_context.h17 #define cpu_asid(mm) (atomic64_read(&mm->context.asid) & ASID_MASK)
19 #define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.asid, 0); 0; })
32 setup_pgd(next->pgd, next->context.asid.counter);
H A Dasid.h46 u64 asid, old_active_asid; local
48 asid = atomic64_read(pasid);
66 !((asid ^ atomic64_read(&info->generation)) >> info->bits) &&
68 old_active_asid, asid))
/linux-master/arch/arm64/mm/
H A Dcontext.c38 #define ctxid2asid(asid) ((asid) & ~ASID_MASK)
39 #define asid2ctxid(asid, genid) ((asid) | (genid))
44 u32 asid; local
54 asid = 8;
57 asid = 16;
60 return asid;
66 u32 asid = get_cpu_asid_bits(); local
68 if (asid < asid_bit
107 u64 asid; local
134 check_update_reserved_asid(u64 asid, u64 newasid) argument
161 u64 asid = atomic64_read(&mm->context.id); local
219 u64 asid, old_active_asid; local
258 atomic64_set(this_cpu_ptr(&active_asids), asid); local
276 u64 asid; local
322 u64 asid = atomic64_read(&mm->context.id); local
352 unsigned long asid = ASID(mm); local
[all...]
/linux-master/arch/arm/mm/
H A Dcontext.c56 u64 context_id, asid; local
67 asid = per_cpu(active_asids, cpu).counter;
68 if (asid == 0)
69 asid = per_cpu(reserved_asids, cpu);
70 if (context_id == asid)
139 u64 asid; local
144 asid = atomic64_xchg(&per_cpu(active_asids, i), 0);
152 if (asid == 0)
153 asid = per_cpu(reserved_asids, i);
154 __set_bit(asid
165 check_update_reserved_asid(u64 asid, u64 newasid) argument
192 u64 asid = atomic64_read(&mm->context.id); local
241 u64 asid; local
270 atomic64_set(&per_cpu(active_asids, cpu), asid); local
[all...]
/linux-master/arch/xtensa/include/asm/
H A Dmmu.h17 unsigned long asid[NR_CPUS]; member in struct:__anon3234
H A Dmmu_context.h72 unsigned long asid = cpu_asid_cache(cpu); local
73 if ((++asid & ASID_MASK) == 0) {
75 * Start new asid cycle; continue counting with next
79 asid += ASID_USER_FIRST;
81 cpu_asid_cache(cpu) = asid;
82 mm->context.asid[cpu] = asid;
93 unsigned long asid = mm->context.asid[cpu]; local
95 if (asid
[all...]
/linux-master/arch/csky/mm/
H A Dasid.c14 #include <asm/asid.h>
21 #define asid2idx(info, asid) (((asid) & ~ASID_MASK(info)) >> (info)->ctxt_shift)
27 u64 asid; local
33 asid = atomic64_xchg_relaxed(&active_asid(info, i), 0);
41 if (asid == 0)
42 asid = reserved_asid(info, i);
43 __set_bit(asid2idx(info, asid), info->map);
44 reserved_asid(info, i) = asid;
54 static bool check_update_reserved_asid(struct asid_info *info, u64 asid, argument
83 u64 asid = atomic64_read(pasid); local
141 u64 asid; local
154 atomic64_set(&active_asid(info, cpu), asid); local
[all...]
H A Dcontext.c9 #include <asm/asid.h>
21 asid_check_context(&asid_info, &mm->context.asid, cpu, mm);
/linux-master/arch/loongarch/include/asm/
H A Dmmu.h12 u64 asid[NR_CPUS]; member in struct:__anon6
H A Dmmu_context.h22 * as a software asid extension.
34 #define cpu_context(cpu, mm) ((mm)->context.asid[cpu])
54 u64 asid = asid_cache(cpu); local
56 if (!((++asid) & cpu_asid_mask(&cpu_data[cpu])))
57 local_flush_tlb_user(); /* start new asid cycle */
59 cpu_context(cpu, mm) = asid_cache(cpu) = asid;
130 int asid; local
135 asid = read_csr_asid() & cpu_asid_mask(&current_cpu_data);
137 if (asid == cpu_asid(cpu, mm)) {
/linux-master/arch/arc/include/asm/
H A Dmmu.h14 unsigned long asid[NR_CPUS]; /* 8 bit MMU PID + Generation cycle */ member in struct:__anon2
/linux-master/drivers/accel/habanalabs/common/
H A Dasid.c50 void hl_asid_free(struct hl_device *hdev, unsigned long asid) argument
52 if (asid == HL_KERNEL_ASID_ID || asid >= hdev->asic_prop.max_asid) {
53 dev_crit(hdev->dev, "Invalid ASID %lu", asid);
57 clear_bit(asid, hdev->asid_bitmap);
/linux-master/arch/riscv/mm/
H A Dtlbflush.c10 static inline void local_flush_tlb_all_asid(unsigned long asid) argument
12 if (asid != FLUSH_TLB_NO_ASID)
15 : "r" (asid)
22 unsigned long asid)
24 if (asid != FLUSH_TLB_NO_ASID)
27 : "r" (addr), "r" (asid)
42 unsigned long asid)
48 local_flush_tlb_all_asid(asid);
53 local_flush_tlb_page_asid(start, asid);
59 unsigned long size, unsigned long stride, unsigned long asid)
21 local_flush_tlb_page_asid(unsigned long addr, unsigned long asid) argument
39 local_flush_tlb_range_threshold_asid(unsigned long start, unsigned long size, unsigned long stride, unsigned long asid) argument
58 local_flush_tlb_range_asid(unsigned long start, unsigned long size, unsigned long stride, unsigned long asid) argument
89 unsigned long asid; member in struct:flush_tlb_range_data
102 __flush_tlb_range(const struct cpumask *cmask, unsigned long asid, unsigned long start, unsigned long size, unsigned long stride) argument
[all...]
/linux-master/arch/sh/mm/
H A Dtlbflush_32.c21 unsigned long asid; local
24 asid = cpu_asid(cpu, vma->vm_mm);
30 set_asid(asid);
32 local_flush_tlb_one(asid, page);
56 unsigned long asid; local
59 asid = cpu_asid(cpu, mm);
65 set_asid(asid);
68 local_flush_tlb_one(asid, start);
89 unsigned long asid; local
92 asid
[all...]
/linux-master/arch/mips/lib/
H A Dr3k_dump_tlb.c27 unsigned int asid; local
31 asid = read_c0_entryhi() & asid_mask;
46 (entryhi & asid_mask) == asid)) {
52 pr_cont("va=%08lx asid=%08lx"
65 write_c0_entryhi(asid);
/linux-master/arch/mips/include/asm/
H A Dmmu.h11 u64 asid[NR_CPUS]; member in union:__anon518::__anon519
/linux-master/arch/arm64/include/asm/
H A Dtlbflush.h58 #define __TLBI_VADDR(addr, asid) \
62 __ta |= (unsigned long)(asid) << 48; \
145 #define __TLBI_VADDR_RANGE(baddr, asid, scale, num, ttl) \
154 __ta |= (unsigned long)(asid) << 48; \
268 unsigned long asid; local
271 asid = __TLBI_VADDR(0, ASID(mm));
272 __tlbi(aside1is, asid);
273 __tlbi_user(aside1is, asid);
363 * @asid: The ASID of the task (0 for IPA instructions)
390 asid, tlb_leve
432 unsigned long asid, pages; local
[all...]
/linux-master/arch/csky/abiv1/inc/abi/
H A Dckmmu.h91 static inline void setup_pgd(pgd_t *pgd, int asid) argument
94 write_mmu_entryhi(asid);
/linux-master/arch/csky/abiv2/inc/abi/
H A Dckmmu.h114 static inline void setup_pgd(pgd_t *pgd, int asid) argument
131 :"r"(asid), "r"(__pa(pgd) | BIT(0))
/linux-master/arch/x86/kvm/svm/
H A Dsvm_ops.h49 static inline void invlpga(unsigned long addr, u32 asid) argument
51 svm_asm2(invlpga, "c"(asid), "a"(addr));
/linux-master/arch/loongarch/lib/
H A Ddump_tlb.c30 unsigned long s_entryhi, entryhi, asid; local
52 asid = read_csr_asid();
61 asid != s_asid)
72 pr_cont("va=0x%0*lx asid=0x%0*lx",
73 vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);

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