Searched refs:app_resident_code_offset (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgp108.c44 const u64 code = base + lsfw->app_resident_code_offset;
49 .non_sec_code_off = lsfw->app_resident_code_offset,
H A Dgm200.c61 const u64 code = base + lsfw->app_resident_code_offset;
66 .non_sec_code_off = lsfw->app_resident_code_offset,
H A Dgm20b.c56 const u64 code = (base + lsfw->app_resident_code_offset) >> 8;
61 .non_sec_code_off = lsfw->app_resident_code_offset,
/linux-master/drivers/gpu/drm/nouveau/include/nvfw/
H A Dls.h22 u32 app_resident_code_offset; member in struct:nvfw_ls_desc_head
70 u32 app_resident_code_offset; member in struct:nvfw_ls_desc_v2
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/acr/
H A Dlsfw.c129 lsfw->app_resident_code_offset = desc->app_resident_code_offset;
205 lsfw->app_resident_code_offset = desc->app_resident_code_offset;
291 lsfw->app_resident_code_offset = 0;
306 lsfw->app_resident_code_offset, inst->data, inst->size);
367 lsfw->app_resident_code_offset = 0;
383 lsfw->app_resident_code_offset, inst->data, inst->size);
H A Dga102.c86 hdr->app_code_off = lsfw->app_start_offset + lsfw->app_resident_code_offset;
H A Dgm200.c105 lsfw->app_resident_code_offset;
/linux-master/drivers/gpu/drm/nouveau/nvkm/nvfw/
H A Dls.c62 hdr->app_resident_code_offset);
138 nvkm_debug(subdev, "\tappResidentCodeOffset: 0x%x\n", hdr->app_resident_code_offset);
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dacr.h90 u32 app_resident_code_offset; member in struct:nvkm_acr_lsfw
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgm20b.c91 const u64 code = (base + lsfw->app_resident_code_offset) >> 8;
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sec2/
H A Dgp102.c258 .non_sec_code_off = lsfw->app_resident_code_offset,

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