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be99d041 |
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01-Jun-2022 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: move reset during golden ctx init to fecs_reset() Ampere. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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864d37c3 |
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03-Dec-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: switch to instanced constructor Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
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b9c246ad |
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15-Jun-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gm200-: explicitly handle nofw Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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9d350c5e |
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14-Jan-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/secboot: remove Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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22dcda45 |
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14-Jan-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/acr: implement new subdev to replace "secure boot" ACR is responsible for managing the firmware for LS (Low Secure) falcons, this was previously handled in the driver by SECBOOT. This rewrite started from some test code that attempted to replicate the procedure RM uses in order to debug early Turing ACR firmwares that were provided by NVIDIA for development. Compared with SECBOOT, the code is structured into more individual steps, with the aim of making the process easier to follow/debug, whilst making it possible to support newer firmware versions that may have a different binary format or API interface. The HS (High Secure) binary(s) are now booted earlier in device init, to match the behaviour of RM, whereas SECBOOT would delay this until we try to boot the first LS falcon. There's also additional debugging features available, with the intention of making it easier to solve issues during FW/HW bring-up in the future. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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4f556362 |
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14-Jan-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: initialise SW state for falcon from constructor This will allow us to register the falcon with ACR, and further customise its behaviour by providing the nvkm_falcon_func structure directly. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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ef16dc27 |
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14-Jan-2020 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: select implementation based on available FW This will allow for further customisation of the subdev depending on what firmware is available. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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e9d03335 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gp100-: use correct registers for zbc colour/depth setup These were missed the first time around due to the driver version I traced using the older registers still. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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068cae74 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: calculate and use sm mapping table There's a number of places that require this data, so let's separate out the calculations to ensure they remain consistent. This is incorrect for GM200 and newer, but will produce the same results as we did before. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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5f6474a4 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: port tile mapping calculations from NVGPU There's also a couple of hardcoded tables for a couple of very specific configurations that NVGPU's algorithm didn't work for. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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5c05a589 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: virtualise trap_mp Required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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02917aa3 |
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08-May-2018 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: virtualise init_zcull Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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87ac331e |
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18-Apr-2016 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gk104-: move rop_active_fbps init to nonctx Matches newer RM. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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734a0aa6 |
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13-Apr-2016 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gm200-: rop count == ltc count Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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c83e7d68 |
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13-Apr-2016 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gm200: modify the mask when copying mmu settings from fb Appears to more closely match what RM does. For GM20B, now also copying bit 12 from NV_PFB_MMU_CTRL as upcoming changes will require it. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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64cb5a31 |
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13-Apr-2016 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr/gf100-: abstract fetching rop count Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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923f1bd2 |
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23-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/secboot/gm20b: add secure boot support Add secure boot support for the GM20B chip found in Tegra X1. Secure boot on Tegra works slightly differently from desktop, notably in the way the WPR region is set up. In addition, the firmware bootloaders use a slightly different header format. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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f008d8c7 |
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23-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/gr/gm200: load external firmware and bundles Load firmware and bundles in GM200's constructor. The previously called GF100 function did not care about the bundles. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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336c4652 |
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23-Feb-2016 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/gr/gk20a: move firmware bundle release to gf100 Some members of gf100_gr were freed by the gk20a driver. That's not where it should be done - free them in gf100 so other chips that use NVIDIA-provided firmware free these structures properly. This also removes the need for a GK20A-specific destructor. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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c85ee6ca |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: convert to new-style nvkm_engine Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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27f3d6cf |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: convert user classes to new-style nvkm_object Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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a65955e1 |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: remove dependence on namedb/engctx lookup Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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276836d4 |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: switch to device pri macros Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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bfee3f3d |
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19-Aug-2015 |
Ben Skeggs <bskeggs@redhat.com> |
drm/nouveau/gr: cosmetic changes This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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a032fb9d |
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23-Jun-2015 |
Alexandre Courbot <acourbot@nvidia.com> |
drm/nouveau/gr: add GM20B support Add support for GM20B's graphics engine, based on GK20A. Note that this code alone will not allow the engine to initialize on released devices which require PMU-assisted secure boot. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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