Searched refs:_val (Results 1 - 25 of 121) sorted by relevance

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/linux-master/arch/openrisc/include/asm/
H A Dspr.h16 #define mtspr(_spr, _val) __asm__ __volatile__ ( \
18 : : "K" (_spr), "r" (_val))
19 #define mtspr_off(_spr, _off, _val) __asm__ __volatile__ ( \
21 : : "r" (_off), "r" (_val), "K" (_spr))
/linux-master/drivers/staging/rtl8723bs/include/
H A Drtw_ht.h81 #define SET_HT_CTRL_CSI_STEERING(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+2, 6, 2, _val)
82 #define SET_HT_CTRL_NDP_ANNOUNCEMENT(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart)+3, 0, 1, _val)
86 #define SET_EXT_CAPABILITY_ELE_BSS_COEXIST(_pEleStart, _val) SET_BITS_TO_LE_1BYTE((_pEleStart), 0, 1, _val)
96 #define SET_HT_CAP_TXBF_RECEIVE_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 3, 1, ((u8)_val))
97 #define SET_HT_CAP_TXBF_TRANSMIT_NDP_CAP(_pEleStart, _val) SET_BITS_TO_LE_4BYTE(((u8 *)(_pEleStart))+21, 4, 1, ((u8)_val))
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H A Dbasic_types.h39 #define EF1BYTE(_val) \
40 ((u8)(_val))
41 #define EF2BYTE(_val) \
42 (le16_to_cpu(_val))
43 #define EF4BYTE(_val) \
44 (le32_to_cpu(_val))
56 #define WRITEEF1BYTE(_ptr, _val) \
58 (*((u8 *)(_ptr))) = EF1BYTE(_val); \
61 #define WRITEEF2BYTE(_ptr, _val) \
63 (*((u16 *)(_ptr))) = EF2BYTE(_val); \
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/linux-master/arch/riscv/include/asm/
H A Derrata_list.h52 * _val is marked as "will be overwritten", so need to set it to 0
57 #define ALT_SVPBMT(_val, prot) \
63 : "=r"(_val) \
75 #define ALT_THEAD_PMA(_val) \
87 : "+r"(_val) \
93 #define ALT_THEAD_PMA(_val)
/linux-master/drivers/net/wireless/realtek/rtlwifi/
H A Dbase.h49 #define SET_80211_PS_POLL_AID(_hdr, _val) \
50 (*(u16 *)((u8 *)(_hdr) + 2) = _val)
51 #define SET_80211_PS_POLL_BSSID(_hdr, _val) \
52 ether_addr_copy(((u8 *)(_hdr)) + 4, (u8 *)(_val))
53 #define SET_80211_PS_POLL_TA(_hdr, _val) \
54 ether_addr_copy(((u8 *)(_hdr))+10, (u8 *)(_val))
56 #define SET_80211_HDR_ADDRESS1(_hdr, _val) \
57 CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS1, (u8 *)(_val))
58 #define SET_80211_HDR_ADDRESS2(_hdr, _val) \
59 CP_MACADDR((u8 *)(_hdr)+FRAME_OFFSET_ADDRESS2, (u8 *)(_val))
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/linux-master/arch/mips/ath25/
H A Ddevices.h7 #define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S)
/linux-master/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h157 #define _MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
159 .val = _val, \
167 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
168 _MPP_VAR_FUNCTION(_val, _name, _subname, _mask)
170 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \
171 _MPP_VAR_FUNCTION(_val, _name, NULL, _mask)
174 #define MPP_FUNCTION(_val, _name, _subname) \
175 MPP_VAR_FUNCTION(_val, _name, _subname, (u8)-1)
/linux-master/arch/mips/include/asm/sn/
H A Dagent.h33 #define SET_HUB_NIC(_my_cpuid, _val) \
34 (HUB_S(HUB_NIC_ADDR(_my_cpuid), (_val)))
/linux-master/include/linux/
H A Dbitfield.h63 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \
68 BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
70 (0 + (_val)) : 0, \
95 * @_val: value to test against the field
97 * Return: true if @_val can fit inside @_mask, false if @_val is too big.
99 #define FIELD_FIT(_mask, _val) \
102 !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
108 * @_val: value to put in the field
113 #define FIELD_PREP(_mask, _val) \
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/linux-master/drivers/net/wireless/intel/iwlwifi/
H A Diwl-csr.h296 #define CSR_HW_REV_STEP_DASH(_val) ((_val) & CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP_DASH)
297 #define CSR_HW_REV_TYPE(_val) (((_val) & 0x000FFF0) >> 4)
300 #define CSR_HW_RFID_FLAVOR(_val) (((_val) & 0x000000F) >> 0)
301 #define CSR_HW_RFID_DASH(_val) (((_val) & 0x00000F0) >> 4)
302 #define CSR_HW_RFID_STEP(_val) (((_val)
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/linux-master/tools/include/linux/
H A Dbitfield.h60 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \
65 BUILD_BUG_ON_MSG(__builtin_constant_p(_val) ? \
66 ~((_mask) >> __bf_shf(_mask)) & (_val) : 0, \
91 * @_val: value to test against the field
93 * Return: true if @_val can fit inside @_mask, false if @_val is too big.
95 #define FIELD_FIT(_mask, _val) \
98 !((((typeof(_mask))_val) << __bf_shf(_mask)) & ~(_mask)); \
104 * @_val: value to put in the field
109 #define FIELD_PREP(_mask, _val) \
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/linux-master/drivers/media/i2c/ccs/
H A Dccs-quirk.h59 #define CCS_MK_QUIRK_REG_8(_reg, _val) \
62 .val = _val, \
/linux-master/arch/x86/include/asm/
H A Drmwcc.h48 #define GEN_BINARY_RMWcc_6(op, var, cc, vcon, _val, arg0) \
50 __CLOBBERS_MEM(), [val] vcon (_val))
61 #define GEN_BINARY_SUFFIXED_RMWcc(op, suffix, var, cc, vcon, _val, clobbers...)\
63 __CLOBBERS_MEM(clobbers), [val] vcon (_val))
/linux-master/include/rdma/
H A Drdma_netlink.h32 #define MODULE_ALIAS_RDMA_NETLINK(_index, _val) \
35 BUILD_BUG_ON(_index != _val); \
37 MODULE_ALIAS("rdma-netlink-subsys-" __stringify(_val))
/linux-master/drivers/net/ethernet/stmicro/stmmac/
H A Dstmmac_est.h40 typeof(val) _val = (val); \
41 (_val > 4 ? GENMASK(18, 16) : \
42 _val > 2 ? GENMASK(17, 16) : \
/linux-master/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-common.h1451 #define SET_BITS(_var, _index, _width, _val) \
1454 (_var) |= (((_val) & ((0x1 << (_width)) - 1)) << (_index)); \
1460 #define SET_BITS_LE(_var, _index, _width, _val) \
1463 (_var) |= cpu_to_le32((((_val) & \
1480 #define XGMAC_SET_BITS(_var, _prefix, _field, _val) \
1483 _prefix##_##_field##_WIDTH, (_val))
1490 #define XGMAC_SET_BITS_LE(_var, _prefix, _field, _val) \
1493 _prefix##_##_field##_WIDTH, (_val))
1510 #define XGMAC_IOWRITE(_pdata, _reg, _val) \
1511 iowrite32((_val), (_pdat
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/linux-master/arch/mips/include/asm/
H A Dmips-gic.h131 uint64_t _val; \
134 _val = __raw_readq(addr); \
135 _val &= ~BIT_ULL(intr % 64); \
136 _val |= (uint64_t)val << (intr % 64); \
137 __raw_writeq(_val, addr); \
139 uint32_t _val; \
142 _val = __raw_readl(addr); \
143 _val &= ~BIT(intr % 32); \
144 _val |= val << (intr % 32); \
145 __raw_writel(_val, add
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/linux-master/drivers/media/tuners/
H A Dmc44s803_priv.h179 #define MC44S803_REG_SM(_val, _reg) \
180 (((_val) << _reg##_S) & (_reg))
183 #define MC44S803_REG_MS(_val, _reg) \
184 (((_val) & (_reg)) >> _reg##_S)
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
H A Dfw.h324 #define FW_CMD_IO_UPDATE(rtlpriv, _val) \
325 rtlpriv->rtlhal.fwcmd_iomap = _val;
327 #define FW_CMD_IO_SET(rtlpriv, _val) \
329 rtl_write_word(rtlpriv, LBUS_MON_ADDR, (u16)_val); \
330 FW_CMD_IO_UPDATE(rtlpriv, _val); \
333 #define FW_CMD_PARA_SET(rtlpriv, _val) \
335 rtl_write_dword(rtlpriv, LBUS_ADDR_MASK, _val); \
336 rtlpriv->rtlhal.fwcmd_ioparam = _val; \
/linux-master/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.h198 #define SUNXI_FUNCTION(_val, _name) \
201 .muxval = _val, \
204 #define SUNXI_FUNCTION_VARIANT(_val, _name, _variant) \
207 .muxval = _val, \
211 #define SUNXI_FUNCTION_IRQ(_val, _irq) \
214 .muxval = _val, \
218 #define SUNXI_FUNCTION_IRQ_BANK(_val, _bank, _irq) \
221 .muxval = _val, \
/linux-master/drivers/nvmem/
H A Duniphier-efuse.c20 unsigned int reg, void *_val, size_t bytes)
23 u8 *val = _val;
19 uniphier_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) argument
/linux-master/drivers/pinctrl/mediatek/
H A Dpinctrl-paris.h37 #define MTK_FUNCTION(_val, _name) \
39 .muxval = _val, \
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dreg.h96 #define IS_MASKED_BITS_ENABLED(_val, _b) \
97 (((_val) & _MASKED_BIT_ENABLE(_b)) == _MASKED_BIT_ENABLE(_b))
98 #define IS_MASKED_BITS_DISABLED(_val, _b) \
99 ((_val) & _MASKED_BIT_DISABLE(_b))
/linux-master/drivers/clk/meson/
H A Dvid-pll-div.c33 #define VID_PLL_DIV(_val, _sel, _ft, _fb) \
35 .shift_val = (_val), \
/linux-master/drivers/net/wireless/ath/
H A Dhw.c24 #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)

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