| /linux-master/drivers/clk/stm32/ |
| H A D | clk-stm32-core.h | 163 #define STM32_CLOCK_CFG(_binding, _clk, _sec_id, _struct, _register)\
167 .clock_cfg = (_struct) {_clk},\
171 #define STM32_MUX_CFG(_binding, _clk, _sec_id)\
172 STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_mux *,\
175 #define STM32_GATE_CFG(_binding, _clk, _sec_id)\
176 STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_gate *,\
179 #define STM32_DIV_CFG(_binding, _clk, _sec_id)\
180 STM32_CLOCK_CFG(_binding, &(_clk), _sec_id, struct clk_stm32_div *,\
183 #define STM32_COMPOSITE_CFG(_binding, _clk, _sec_id)\
184 STM32_CLOCK_CFG(_binding, &(_clk), _sec_i
[all...] |
| /linux-master/include/linux/ |
| H A D | sh_clk.h | 200 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
201 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
202 #define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
|
| /linux-master/arch/arm/mach-omap2/ |
| H A D | omap_hwmod.h | 173 * @_clk: pointer to the struct clk (filled in at runtime)
181 struct clk *_clk; member in struct:omap_hwmod_opt_clk
227 * @_clk: pointer to the interface struct clk (filled in at runtime)
244 struct clk *_clk; member in struct:omap_hwmod_ocp_if
539 * @_clk: pointer to the main struct clk (filled in at runtime)
585 struct clk *_clk; member in struct:omap_hwmod
|
| H A D | omap_hwmod.c | 635 } else if (oh->_clk) {
636 if (!omap2_clk_is_hw_omap(__clk_get_hw(oh->_clk)))
638 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
817 * Called from _init_clocks(). Populates the @oh _clk (main
832 oh->_clk = clk;
838 oh->_clk = clk_get(NULL, oh->main_clk);
841 if (IS_ERR(oh->_clk)) {
854 clk_prepare(oh->_clk);
887 os->_clk = c;
896 clk_prepare(os->_clk);
[all...] |
| H A D | display.c | 383 clk_prepare_enable(oc->_clk);
409 clk_disable_unprepare(oc->_clk);
|
| /linux-master/drivers/clk/qcom/ |
| H A D | clk-rpm.c | 35 static struct clk_rpm clk_rpm_##_name##_clk = { \
41 .name = #_name "_clk", \
48 .peer = &clk_rpm_##_name##_clk, \
60 static struct clk_rpm clk_rpm_##_name##_clk = { \
65 .name = #_name "_clk", \
72 static struct clk_rpm clk_rpm_##_name##_clk = { \
77 .name = #_name "_clk", \
|
| H A D | clk-smd-rpm.c | 108 __DEFINE_CLK_SMD_RPM(_name##_clk, _name##_a_clk, \
113 _name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id, \
118 _name##_clk, _name##_a_clk, QCOM_SMD_RPM_BUS_CLK, r_id, \
128 _name##_clk, _name##_a_clk, \
137 __DEFINE_CLK_SMD_RPM(_name##_clk, _name##_a_clk, \
|
| /linux-master/drivers/ufs/host/ |
| H A D | ufs-exynos.c | 497 unsigned long clk = 0, _clk, clk_period; local
502 _clk = NSEC_PER_SEC * mult / (clk_period * divs[i] * div);
503 if (_clk >= pwm_min && _clk <= pwm_max) {
504 if (_clk > clk) {
506 clk = _clk;
|
| /linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| H A D | gm20b.c | 852 struct gm20b_clk *_clk = gm20b_clk(base); local
856 _clk->uv = nvkm_volt_get(volt);
859 ret = gm20b_clk_init_dvfs(_clk);
|
| /linux-master/drivers/clk/renesas/ |
| H A D | r9a06g032-clocks.c | 156 #define I_GATE(_clk, _rst, _rdy, _midle, _scon, _mirack, _mistat) { \
157 .gate = _clk, \
|