Searched refs:__raw_readw (Results 1 - 25 of 141) sorted by relevance

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/linux-master/arch/sh/include/mach-se/mach/
H A Dmrshpc.h9 if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0)
12 if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) {
24 if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
33 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
43 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0)
/linux-master/arch/sh/kernel/cpu/sh3/
H A Dserial-sh7710.c13 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR);
14 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR);
16 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR);
H A Dserial-sh7720.c16 data = __raw_readw(PORT_PTCR);
20 data = __raw_readw(PORT_PVCR);
26 data = __raw_readw(PORT_PTCR);
30 data = __raw_readw(PORT_PVCR);
H A Dserial-sh770x.c15 data = __raw_readw(SCPCR);
21 data = __raw_readw(SCPCR);
H A Dclock-sh7709.c24 int frqcr = __raw_readw(FRQCR);
36 int frqcr = __raw_readw(FRQCR);
48 int frqcr = __raw_readw(FRQCR);
61 int frqcr = __raw_readw(FRQCR);
H A Dclock-sh7705.c32 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
41 int idx = __raw_readw(FRQCR) & 0x0003;
51 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
61 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
H A Dclock-sh7706.c24 int frqcr = __raw_readw(FRQCR);
36 int frqcr = __raw_readw(FRQCR);
48 int frqcr = __raw_readw(FRQCR);
60 int frqcr = __raw_readw(FRQCR);
H A Dclock-sh7710.c26 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
35 int idx = (__raw_readw(FRQCR) & 0x0007);
45 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
55 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
H A Dclock-sh3.c28 int frqcr = __raw_readw(FRQCR);
40 int frqcr = __raw_readw(FRQCR);
52 int frqcr = __raw_readw(FRQCR);
64 int frqcr = __raw_readw(FRQCR);
H A Dclock-sh7712.c23 int frqcr = __raw_readw(FRQCR);
35 int frqcr = __raw_readw(FRQCR);
47 int frqcr = __raw_readw(FRQCR);
/linux-master/arch/sh/boards/mach-se/7206/
H A Dirq.c37 val = __raw_readw(INTC_IPR01);
41 msk0 = __raw_readw(INTMSK0);
42 msk1 = __raw_readw(INTMSK1);
68 val = __raw_readw(INTC_IPR01);
73 msk0 = __raw_readw(INTMSK0);
74 msk1 = __raw_readw(INTMSK1);
100 sts0 = __raw_readw(INTSTS0);
101 sts1 = __raw_readw(INTSTS1);
143 __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */
/linux-master/arch/sh/boot/romimage/
H A Dmmcif-sh7724.c48 __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR);
51 __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA);
54 __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE);
57 __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC);
60 __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA);
/linux-master/arch/sh/boards/mach-sh7763rdp/
H A Dsetup.c163 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1)
169 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2);
171 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR);
178 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR);
180 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR);
184 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2);
186 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3);
190 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1);
192 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4);
195 __raw_writew((__raw_readw(PORT_PSEL
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/linux-master/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4.c28 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
37 int idx = (__raw_readw(FRQCR) & 0x0007);
47 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
57 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
/linux-master/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7201.c27 pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
36 int idx = (__raw_readw(FREQCR) & 0x0007);
46 int idx = (__raw_readw(FREQCR) & 0x0007);
56 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
H A Dclock-sh7206.c26 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
35 int idx = (__raw_readw(FREQCR) & 0x0007);
45 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
54 int idx = (__raw_readw(FREQCR) & 0x0007);
H A Dclock-sh7203.c29 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult;
38 int idx = (__raw_readw(FREQCR) & 0x0007);
48 int idx = (__raw_readw(FREQCR) & 0x0007);
/linux-master/arch/sh/include/mach-ecovec24/mach/
H A Dromimage.h42 __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dserial-sh7722.c13 data = __raw_readw(PSCR);
/linux-master/arch/sparc/include/asm/
H A Dio.h16 #define readw_be(__addr) __raw_readw(__addr)
/linux-master/arch/sh/kernel/cpu/sh2/
H A Dclock-sh7619.c25 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
34 int idx = (__raw_readw(FREQCR) & 0x0007);
44 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
/linux-master/include/asm-generic/
H A Dlogic_io.h42 #define __raw_readw __raw_readw macro
43 u16 __raw_readw(const volatile void __iomem *addr);
/linux-master/arch/sh/kernel/cpu/irq/
H A Dipr.c35 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
36 (void)__raw_readw(addr); /* Read back to flush write posting */
44 __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
/linux-master/arch/sh/cchips/hd6446x/
H A Dhd64461.c27 nimr = __raw_readw(HD64461_NIMR);
38 nimr = __raw_readw(HD64461_NIMR);
62 unsigned short intv = __raw_readw(HD64461_NIRR);
/linux-master/arch/sh/boards/mach-se/7721/
H A Dirq.c38 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118);

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