Searched refs:V7M_SCB_CCSIDR (Results 1 - 3 of 3) sorted by path

/linux-master/arch/arm/include/asm/
H A Dcachetype.h97 return readl(BASEADDR_V7M_SCB + V7M_SCB_CCSIDR);
H A Dv7m.h59 #define V7M_SCB_CCSIDR 0x80 /* Cache size ID register */ macro
/linux-master/arch/arm/mm/
H A Dcache-v7m.S39 v7m_cache_read \rt, V7M_SCB_CCSIDR

Completed in 154 milliseconds