Searched refs:TSUNAMI_cchip (Results 1 - 3 of 3) sorted by relevance

/linux-master/arch/alpha/kernel/
H A Dcore_tsunami.c229 TSUNAMI_cchip->misc.csr |= (1L << 28); /* clear NXM... */
233 if (TSUNAMI_cchip->misc.csr & (1L << 28)) {
234 int source = (TSUNAMI_cchip->misc.csr >> 29) & 7;
235 TSUNAMI_cchip->misc.csr |= (1L << 28); /* ...and unlock NXS. */
389 tmp = (unsigned long)(TSUNAMI_cchip - 1);
398 printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr);
399 printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr);
400 printk("%s: CSR_MISC 0x%lx\n", __func__, TSUNAMI_cchip->misc.csr);
401 printk("%s: CSR_DIM0 0x%lx\n", __func__, TSUNAMI_cchip->dim0.csr);
402 printk("%s: CSR_DIM1 0x%lx\n", __func__, TSUNAMI_cchip
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H A Dsys_dp264.c49 register tsunami_cchip *cchip = TSUNAMI_cchip;
197 pld = TSUNAMI_cchip->dir0.csr;
/linux-master/arch/alpha/include/asm/
H A Dcore_tsunami.h89 #define TSUNAMI_cchip ((tsunami_cchip *)(IDENT_ADDR+TS_BIAS+0x1A0000000UL)) macro

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