Searched refs:SET_REG (Results 1 - 6 of 6) sorted by relevance
/linux-master/sound/pci/hda/ |
H A D | patch_si3054.c | 65 #define SET_REG(codec,reg,val) (snd_hda_codec_write(codec,reg,0,SI3054_VERB_WRITE_NODE,val)) macro 143 SET_REG(codec, SI3054_LINE_RATE, substream->runtime->rate); 147 SET_REG(codec, SI3054_LINE_LEVEL, val); 217 SET_REG(codec, SI3054_LINE_RATE, 9600); 218 SET_REG(codec, SI3054_LINE_LEVEL, SI3054_DTAG_MASK|SI3054_ATAG_MASK); 219 SET_REG(codec, SI3054_EXTENDED_MID, 0); 233 SET_REG(codec, SI3054_GPIO_POLARITY, 0xffff); 234 SET_REG(codec, SI3054_GPIO_CFG, 0x0); 235 SET_REG(codec, SI3054_MISC_AFE, 0); 236 SET_REG(code [all...] |
/linux-master/drivers/irqchip/ |
H A D | alphascale_asm9260-icoll.h | 100 + SET_REG)
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H A D | irq-mxs.c | 29 #define SET_REG 4 macro 98 icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); 114 icoll_intr_reg(d) + SET_REG);
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/linux-master/drivers/clocksource/ |
H A D | asm9260_timer.c | 28 #define SET_REG 4 macro 115 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); 137 priv.base + HW_MCR + SET_REG); 151 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); 233 writel_relaxed(BM_C1_EN, priv.base + HW_TCR + SET_REG);
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/linux-master/drivers/media/dvb-frontends/ |
H A D | stv0910.c | 209 #define SET_REG(_reg, _val) \ macro 923 SET_REG(UPLCCST0, 0xe0); 1678 SET_REG(DISTXFIFO, cmd->msg[i]); 1700 SET_REG(DISTXFIFO, value);
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/linux-master/drivers/tty/serial/ |
H A D | mxs-auart.c | 45 #define SET_REG 0x4 macro 500 writel_relaxed(val, addr + SET_REG);
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