Searched refs:R_BCM1480_HSP_TX_SPI4_TRAINING_FMT (Results 1 - 2 of 2) sorted by path

/broadcom-cfe-1.4.2/cfe/arch/mips/chipset/sibyte/include/
H A Dbcm1480_regs.h788 #define R_BCM1480_HSP_TX_SPI4_TRAINING_FMT 0x0000040010 macro
/broadcom-cfe-1.4.2/cfe/arch/mips/cpu/bcm1480/src/
H A Dbcm1480_hsp_utils.c646 value = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_SPI4_TRAINING_FMT));
651 WRITECSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_SPI4_TRAINING_FMT),value);
652 value = READCSR(A_BCM1480_HSP_REGISTER(port,R_BCM1480_HSP_TX_SPI4_TRAINING_FMT));

Completed in 45 milliseconds