Searched refs:RTC_CONTROL (Results 1 - 16 of 16) sorted by relevance

/linux-master/arch/mips/include/asm/
H A Dmc146818-time.h39 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
40 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
82 CMOS_WRITE(save_control, RTC_CONTROL);
105 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
/linux-master/arch/mips/dec/
H A Dtime.c46 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
78 save_control = CMOS_READ(RTC_CONTROL);
79 CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
120 CMOS_WRITE(save_control, RTC_CONTROL);
/linux-master/drivers/rtc/
H A Drtc-ds1742.c25 #define RTC_CONTROL 0 macro
63 writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
73 /* RTC_CENTURY and RTC_CONTROL share same register */
75 writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
90 writeb(RTC_READ, ioaddr + RTC_CONTROL);
99 writeb(0, ioaddr + RTC_CONTROL);
176 writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
178 writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
H A Drtc-mc146818-lib.c139 p->ctrl = CMOS_READ(RTC_CONTROL);
268 save_control = CMOS_READ(RTC_CONTROL);
281 save_control = CMOS_READ(RTC_CONTROL);
282 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
304 CMOS_WRITE(save_control, RTC_CONTROL);
H A Drtc-cmos.c100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
372 rtc_control = CMOS_READ(RTC_CONTROL);
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
392 rtc_control = CMOS_READ(RTC_CONTROL);
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
541 rtc_control = CMOS_READ(RTC_CONTROL);
591 rtc_control = CMOS_READ(RTC_CONTROL);
714 rtc_control = CMOS_READ(RTC_CONTROL);
718 /* If we were suspended, RTC_CONTROL ma
1476 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); local
[all...]
H A Drtc-ds1553.c30 #define RTC_CONTROL (RTC_OFFSET + 8) macro
79 writeb(RTC_WRITE, pdata->ioaddr + RTC_CONTROL);
89 /* RTC_CENTURY and RTC_CONTROL share same register */
91 writeb(century & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
106 writeb(RTC_READ, ioaddr + RTC_CONTROL);
115 writeb(0, ioaddr + RTC_CONTROL);
281 writeb(RTC_WRITE, ioaddr + RTC_CONTROL);
283 writeb(cen & RTC_CENTURY_MASK, ioaddr + RTC_CONTROL);
/linux-master/arch/powerpc/platforms/chrp/
H A Dtime.c93 save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */
95 chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL);
123 chrp_cmos_clock_write(save_control, RTC_CONTROL);
143 if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
/linux-master/arch/powerpc/platforms/maple/
H A Dtime.c62 if (!(maple_clock_read(RTC_CONTROL) & RTC_DM_BINARY)
84 save_control = maple_clock_read(RTC_CONTROL); /* tell the clock it's being set */
86 maple_clock_write((save_control|RTC_SET), RTC_CONTROL);
121 maple_clock_write(save_control, RTC_CONTROL);
/linux-master/arch/mips/mti-malta/
H A Dmalta-time.c98 ctrl = CMOS_READ(RTC_CONTROL);
189 ctrl = CMOS_READ(RTC_CONTROL);
191 CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL);
/linux-master/include/linux/
H A Dmc146818rtc.h95 #define RTC_CONTROL RTC_REG_B macro
/linux-master/arch/m68k/atari/
H A Dtime.c208 ctrl = RTC_READ(RTC_CONTROL); /* control registers are
264 RTC_WRITE( RTC_CONTROL, ctrl | RTC_SET );
283 RTC_WRITE( RTC_CONTROL, ctrl & ~RTC_SET );
/linux-master/arch/alpha/kernel/
H A Dtime.c231 x = CMOS_READ(RTC_CONTROL);
236 CMOS_WRITE(x, RTC_CONTROL);
H A Drtc.c59 ctrl = CMOS_READ(RTC_CONTROL);
/linux-master/arch/sh/include/asm/
H A Dsmc37c93x.h181 #define RTC_CONTROL 11 macro
/linux-master/arch/powerpc/platforms/
H A Dfsl_uli1575.c164 CMOS_WRITE(RTC_SET, RTC_CONTROL);
165 CMOS_WRITE(RTC_24H, RTC_CONTROL);
/linux-master/arch/x86/kernel/apic/
H A Dio_apic.c2105 save_control = CMOS_READ(RTC_CONTROL);
2109 CMOS_WRITE(save_control | RTC_PIE, RTC_CONTROL);
2118 CMOS_WRITE(save_control, RTC_CONTROL);

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