Searched refs:RING_PP_DIR_DCLV (Results 1 - 3 of 3) sorted by path

/linux-master/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c2206 ENGINE_READ(engine, RING_PP_DIR_DCLV));
H A Dintel_engine_regs.h175 #define RING_PP_DIR_DCLV(base) _MMIO((base) + 0x220) macro
H A Dintel_ring_submission.c165 ENGINE_WRITE_FW(engine, RING_PP_DIR_DCLV, PP_DIR_DCLV_2G);
666 *cs++ = i915_mmio_reg_offset(RING_PP_DIR_DCLV(engine->mmio_base));

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