Searched refs:RF_PATH_A (Results 1 - 25 of 45) sorted by relevance

12

/linux-master/drivers/net/wireless/realtek/rtw89/
H A Drtw8922a_rfk.c28 rtw8922a_tssi_cont_en(rtwdev, en, RF_PATH_A);
32 rtw8922a_tssi_cont_en(rtwdev, en, RF_PATH_A);
51 rf_reg[RF_PATH_A][0] = rtw89_read_rf(rtwdev, RF_PATH_A, rf_addr[0], RFREG_MASK);
52 rf_reg[RF_PATH_A][1] = rtw89_read_rf(rtwdev, RF_PATH_A, rf_addr[1], RFREG_MASK);
135 rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RFREG_MASK, 0x80000);
136 rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWA, RFREG_MASK, 0x00003);
137 rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD1, RFREG_MASK, 0x0c990);
138 rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWD
[all...]
H A Drtw8851b_rfk.c281 if (path == RF_PATH_A)
433 _dack_reset(rtwdev, RF_PATH_A);
450 _dack_reload(rtwdev, RF_PATH_A);
500 rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK);
505 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1);
506 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0);
511 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x40001);
516 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1);
853 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_RGM, a_idxrxgain[idx]);
854 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA
[all...]
H A Drtw8851b_rfk_table.c110 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x51, 0x80000, 0x0),
111 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x51, 0x00800, 0x0),
112 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x52, 0x00800, 0x0),
113 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x55, 0x0001f, 0x4),
114 RTW89_DECL_RFK_WRF(RF_PATH_A, 0xef, 0x00004, 0x1),
115 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x00, 0xffff0, 0x403e),
116 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00003, 0x0),
117 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00070, 0x6),
118 RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x1f000, 0x10),
125 RTW89_DECL_RFK_WRF(RF_PATH_A,
[all...]
H A Drtw8852b_rfk.c492 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
528 _check_addc(rtwdev, RF_PATH_A);
543 _check_addc(rtwdev, RF_PATH_A);
588 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
594 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
763 rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK);
768 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0);
770 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1);
776 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0);
782 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MO
[all...]
H A Drtw8852a_rfk.c266 if (path == RF_PATH_A)
319 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
331 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
358 _check_addc(rtwdev, RF_PATH_A);
370 _check_addc(rtwdev, RF_PATH_A);
397 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
403 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
441 _check_dadc(rtwdev, RF_PATH_A);
444 _dack_reload(rtwdev, RF_PATH_A);
505 rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MO
[all...]
H A Drtw8852c_rfk.c311 path_offset = (path == RF_PATH_A ? 0 : 0x28);
408 rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A,
513 rtw8852c_txck_force(rtwdev, RF_PATH_A, true, DAC_160M);
516 _dack_reset(rtwdev, RF_PATH_A);
526 rtw8852c_txck_force(rtwdev, RF_PATH_A, false, DAC_960M);
530 _dack_reload(rtwdev, RF_PATH_A);
596 rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK);
600 rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0);
602 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1);
610 rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOP
[all...]
H A Drtw8851b.c459 tssi->thermal[RF_PATH_A] = map->path_a_therm;
499 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK],
502 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM],
505 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW],
508 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID],
511 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH],
717 rtw89_phy_write32_mask(rtwdev, addr, mask, RF_PATH_A);
950 for (path = RF_PATH_A; path < BB_PATH_NUM_8851B; path++) {
962 offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band];
966 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MAS
[all...]
H A Drtw8852c.c386 tssi->thermal[RF_PATH_A] = map->path_a_therm;
429 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK],
432 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM],
435 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW],
438 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID],
441 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH],
444 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_L0],
447 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_L1],
450 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_M0],
453 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_M
[all...]
H A Drtw8852b.c596 tssi->thermal[RF_PATH_A] = map->path_a_therm;
637 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK],
640 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM],
643 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW],
646 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID],
649 &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH],
1039 for (path = RF_PATH_A; path < BB_PATH_NUM_8852B; path++) {
1051 offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band];
1056 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp);
1066 offset_ofdm = -efuse_gain->offset[RF_PATH_A][gain_ofdm_ban
[all...]
H A Drtw8922a.c491 tssi->thermal[RF_PATH_A] = map->path_a_therm;
525 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK] = map->rx_gain_a._2g_cck;
527 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM] = map->rx_gain_a._2g_ofdm;
529 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW] = map->rx_gain_a._5g_low;
531 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID] = map->rx_gain_a._5g_mid;
533 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH] = map->rx_gain_a._5g_high;
535 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_L0] = map->rx_gain_6g_a._6g_l0;
537 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_L1] = map->rx_gain_6g_a._6g_l1;
539 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_M0] = map->rx_gain_6g_a._6g_m0;
541 gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_6G_M
[all...]
/linux-master/drivers/staging/rtl8723bs/hal/
H A Drtl8723b_rf6052.c66 PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
72 PHY_SetRFReg(Adapter, RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]);
92 /* for (eRFPath = RF_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) */
99 case RF_PATH_A:
124 case RF_PATH_A:
133 case RF_PATH_A:
H A DHalPhyRf.c33 for (p = RF_PATH_A; p < MAX_RF_PATH; ++p) {
96 ThermalValue = (u8)PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH_A, c.ThermalRegAddr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */
157 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_A] =
158 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A];
159 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A] =
163 pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_A] =
178 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[RF_PATH_A] =
179 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A];
180 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[RF_PATH_A] =
184 pDM_Odm->Absolute_OFDMSwingIdx[RF_PATH_A]
[all...]
H A Dodm_HWConfig.c116 phy_info->rx_mimo_signal_quality[RF_PATH_A] = -1;
169 phy_info->rx_mimo_signal_quality[RF_PATH_A] = sq;
179 for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
230 phy_info->rx_mimo_signal_quality[RF_PATH_A] = (u8)(evm & 0xff);
294 RSSI_Ave = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
295 pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
298 pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
302 pPhyInfo->rx_mimo_signal_strength[RF_PATH_A] >
305 RSSI_max = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
309 RSSI_min = pPhyInfo->rx_mimo_signal_strength[RF_PATH_A];
[all...]
H A Drtl8723b_phycfg.c112 if (eRFPath == RF_PATH_A) {
132 if (eRFPath == RF_PATH_A)
311 pHalData->PHYRegDef[RF_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; /* 16 LSBs if read 32-bit from 0x870 */
315 pHalData->PHYRegDef[RF_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; /* 16 LSBs if read 32-bit from 0x860 */
319 pHalData->PHYRegDef[RF_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; /* 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) */
322 pHalData->PHYRegDef[RF_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; /* LSSI Parameter */
325 pHalData->PHYRegDef[RF_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; /* wire control parameter2 */
329 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack;
331 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
402 PHY_SetRFReg(Adapter, RF_PATH_A,
[all...]
H A DHalPhyRf_8723B.c22 #define PATH_S1 0 /* RF_PATH_A */
70 /* if (RFPath == RF_PATH_A) */
72 case RF_PATH_A:
104 case RF_PATH_A:
383 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1);
384 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_RCK_OS, bRFRegOffsetMask, 0x18000);
385 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G1, bRFRegOffsetMask, 0x0003f);
386 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, RF_TXPA_G2, bRFRegOffsetMask, 0xc7f87);
388 /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A, 0xed, bRFRegOffsetMask, 0x00020); */
389 /* PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH_A,
[all...]
H A Dhal_com_phycfg.c70 for (path = RF_PATH_A; path <= RF_PATH_B; ++path) {
350 for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath)
388 for (path = RF_PATH_A; path < RF_PATH_MAX; ++path) {
767 tempPwrLmt = pHalData->TxPwrLimit_2_4G[regulation][bw][rateSection][channel][RF_PATH_A];
769 for (rfPath = RF_PATH_A; rfPath < MAX_RF_PATH_NUM; ++rfPath) {
852 prevPowerLimit = pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A];
855 pHalData->TxPwrLimit_2_4G[regulation][bandwidth][rateSection][channelIndex][RF_PATH_A] = powerLimit;
H A Dodm_CfoTracking.c202 for (i = RF_PATH_A; i <= RF_PATH_B; i++)
H A Dodm_RegConfig8723B.c96 RF_PATH_A,
/linux-master/drivers/staging/rtl8723bs/include/
H A Dhal_phy.h31 RF_PATH_A = 0, enumerator in enum:rf_path
/linux-master/drivers/net/wireless/realtek/rtw88/
H A Drtw8821c.c143 ewma_thermal_init(&dm_info->avg_thermal[RF_PATH_A]);
144 dm_info->delta_power_index[RF_PATH_A] = 0;
145 dm_info->delta_power_index_last[RF_PATH_A] = 0;
315 rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK);
348 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(6), 0x1);
349 rtw_write_rf(rtwdev, RF_PATH_A, 0x64, 0xf, 0xf);
352 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(6), 0x0);
355 rtw_write_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK, rf_reg18);
357 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 0);
358 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX
[all...]
H A Drtw8723d.c79 lc_cal = rtw_read_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK);
81 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, lc_cal | BIT_LCK);
85 rtwdev, RF_PATH_A, RF_CFGCH, BIT_LCK);
89 rtw_write_rf(rtwdev, RF_PATH_A, RF_CFGCH, RFREG_MASK, lc_cal);
125 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) {
275 pkt_stat->rx_power[RF_PATH_A] = pwdb - 97;
278 pkt_stat->signal_power = max(pkt_stat->rx_power[RF_PATH_A],
280 dm_info->rssi[RF_PATH_A] = pkt_stat->rssi;
303 pkt_stat->rx_power[RF_PATH_A] = GET_PHY_STAT_P1_PWDB_A(phy_status) - 110;
306 pkt_stat->signal_power = max(pkt_stat->rx_power[RF_PATH_A],
[all...]
H A Drtw8822b.c61 efuse->thermal_meter[RF_PATH_A] = map->thermal_meter;
135 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) {
515 rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK);
553 rtw_write_rf(rtwdev, RF_PATH_A, RF_MALSEL, RFBE_MASK, rf_reg_be);
557 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x1);
559 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(18), 0x0);
561 rtw_write_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK, rf_reg18);
565 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 0);
566 rtw_write_rf(rtwdev, RF_PATH_A, RF_XTALX2, BIT(19), 1);
813 rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTW
[all...]
H A Drtw8822c.c60 efuse->thermal_meter[RF_PATH_A] = map->path_a_thermal;
240 case RF_PATH_A:
259 case RF_PATH_A:
367 rf_a = rtw_read_rf(rtwdev, RF_PATH_A, 0x0, RFREG_MASK);
406 case RF_PATH_A:
425 rtw_write_rf(rtwdev, RF_PATH_A, 0x0, RFREG_MASK, 0x10000);
482 if (path == RF_PATH_A) {
695 dm_info->dack_dck[RF_PATH_A][0][0] = val;
697 dm_info->dack_dck[RF_PATH_A][0][1] = val;
699 dm_info->dack_dck[RF_PATH_A][
[all...]
H A Dphy.c940 rf_sipi_addr_a = &chip->rf_sipi_read_addr[RF_PATH_A];
2348 swing_table->p[RF_PATH_A] = tbl->pwrtrk_2g_ccka_p;
2349 swing_table->n[RF_PATH_A] = tbl->pwrtrk_2g_ccka_n;
2353 swing_table->p[RF_PATH_A] = tbl->pwrtrk_2ga_p;
2354 swing_table->n[RF_PATH_A] = tbl->pwrtrk_2ga_n;
2359 swing_table->p[RF_PATH_A] = tbl->pwrtrk_5ga_p[RTW_PWR_TRK_5G_1];
2360 swing_table->n[RF_PATH_A] = tbl->pwrtrk_5ga_n[RTW_PWR_TRK_5G_1];
2364 swing_table->p[RF_PATH_A] = tbl->pwrtrk_5ga_p[RTW_PWR_TRK_5G_2];
2365 swing_table->n[RF_PATH_A] = tbl->pwrtrk_5ga_n[RTW_PWR_TRK_5G_2];
2369 swing_table->p[RF_PATH_A]
[all...]
/linux-master/drivers/staging/rtl8712/
H A Drtl871x_mp.c325 u8 path = RF_PATH_A;
379 set_rf_reg(pAdapter, RF_PATH_A, RF_CHNLBW,
383 set_rf_reg(pAdapter, RF_PATH_A, RF_CHNLBW,
484 set_rf_reg(pAdapter, RF_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60);
490 return get_rf_reg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F);
538 rfPath = RF_PATH_A;

Completed in 286 milliseconds

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