Searched refs:PLL_MOD (Results 1 - 7 of 7) sorted by relevance

/linux-master/arch/arm/mach-omap2/
H A Dcm3xxx.c406 omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
408 omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2);
410 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4);
412 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
414 omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
536 omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD,
538 omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
540 omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
542 omap2_cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
544 omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
[all...]
H A Dcm2xxx.c82 v = omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE);
85 omap2_cm_write_mod_reg(v, PLL_MOD, CM_AUTOIDLE);
259 v = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
267 return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2);
H A Dpowerdomains3xxx_data.c320 .prcm_offs = PLL_MOD,
326 .prcm_offs = PLL_MOD,
332 .prcm_offs = PLL_MOD,
H A Dprcm-common.h19 * Technically, in terms of the TRM, OCP_MOD is 34xx only; PLL_MOD is
27 #define PLL_MOD 0x500 macro
39 #define OMAP3430_CCR_MOD PLL_MOD
H A Dsram242x.S117 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKSEL2)
212 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKSEL2)
306 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKEN)
308 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_IDLEST)
310 .word OMAP2420_CM_REGADDR(PLL_MOD, CM_CLKSEL1)
H A Dsram243x.S117 .word OMAP2430_CM_REGADDR(PLL_MOD, CM_CLKSEL2)
212 .word OMAP2430_CM_REGADDR(PLL_MOD, CM_CLKSEL2)
306 .word OMAP2430_CM_REGADDR(PLL_MOD, CM_CLKEN)
308 .word OMAP2430_CM_REGADDR(PLL_MOD, CM_IDLEST)
310 .word OMAP2430_CM_REGADDR(PLL_MOD, CM_CLKSEL1)
H A Dsleep34xx.S33 #define CM_IDLEST_CKGEN_V OMAP34XX_CM_REGADDR(PLL_MOD, CM_IDLEST)

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