Searched refs:PCIEIP_REG_RESBAR_CAP_REG_0_REG_RESBAR_CAP_REG_0_64GB_K2 (Results 1 - 1 of 1) sorted by last modified time

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h4564 #define PCIEIP_REG_RESBAR_CAP_REG_0_REG_RESBAR_CAP_REG_0_64GB_K2 (0x1<<20) // Up to 64GB BAR Supported. Note: The access attributes of this field are as follows: - Dbi: R/W (sticky) Note: This register field is sticky. macro
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