Searched refs:PCIEIP_REG_REG_RC_USER_MEM_HI1_BB (Results 1 - 1 of 1) sorted by path

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h5092 #define PCIEIP_REG_REG_RC_USER_MEM_HI1_BB 0x00055cUL //Access:R DataWidth:0x20 // USER_BAR_HIGHER_ADDRESS: Higher 32 bits of BAR for user in RC mode. This is not the PCI standard compliant BAR, but is instead a mechanism for user to provide a mem range restriction over and above that specified by the PCI Base and Limit registers. macro
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