Searched refs:PCIEIP_REG_PCIEEP_EQ_CTL67_L7DTP_E5 (Results 1 - 1 of 1) sorted by last modified time

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2281 #define PCIEIP_REG_PCIEEP_EQ_CTL67_L7DTP_E5 (0xf<<16) // Lane 7 downstream port transmitter preset. This field reserved if port is operating as a upstream port. macro
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