Searched refs:PCIEIP_REG_PCIEEP_EQ_CTL1011_L10DRPH_E5 (Results 1 - 1 of 1) sorted by path

/freebsd-11-stable/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2315 #define PCIEIP_REG_PCIEEP_EQ_CTL1011_L10DRPH_E5 (0x7<<4) // Lane 10 downstream port receiver preset hint. This field reserved if port is operating as a upstream port. macro
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