Searched refs:MC_SEQ_RD_CTL_D0_LP (Results 1 - 12 of 12) sorted by relevance

/linux-master/drivers/gpu/drm/radeon/
H A Dbtcd.h158 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c macro
H A Dnid.h816 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c macro
H A Dsid.h584 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c macro
H A Dcikd.h709 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c macro
H A Dbtc_dpm.c1843 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2;
2004 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));
H A Devergreend.h334 #define MC_SEQ_RD_CTL_D0_LP 0x2b1c macro
H A Dcypress_dpm.c990 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RD_CTL_D0_LP >> 2;
H A Dni_dpm.c2789 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2;
2895 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));
H A Dci_dpm.c4399 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2;
4607 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));
H A Dsi_dpm.c5380 *out_reg = MC_SEQ_RD_CTL_D0_LP >> 2;
5490 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h585 #define MC_SEQ_RD_CTL_D0_LP 0xAC7 macro
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5917 *out_reg = MC_SEQ_RD_CTL_D0_LP;
6027 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0));

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