Searched refs:MC_SEQ_RAS_TIMING_LP (Results 1 - 12 of 12) sorted by relevance

/linux-master/drivers/gpu/drm/radeon/
H A Dbtcd.h147 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
H A Dnid.h805 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
H A Dsid.h573 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
H A Dcikd.h698 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
H A Dbtc_dpm.c1831 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2;
2000 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));
H A Devergreend.h323 #define MC_SEQ_RAS_TIMING_LP 0x2a6c macro
H A Dcypress_dpm.c974 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2;
H A Dni_dpm.c2777 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2;
2886 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));
H A Dci_dpm.c4369 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2;
4592 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));
H A Dsi_dpm.c5368 *out_reg = MC_SEQ_RAS_TIMING_LP >> 2;
5481 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dsid.h574 #define MC_SEQ_RAS_TIMING_LP 0xA9B macro
/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5905 *out_reg = MC_SEQ_RAS_TIMING_LP;
6018 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING));

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