Searched refs:MAX_REGULAR_DPM_NUMBER (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_hwmgr.h95 #define MAX_REGULAR_DPM_NUMBER 8 macro
100 struct smu7_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
179 phm_ppt_v1_clock_voltage_dependency_record entries[MAX_REGULAR_DPM_NUMBER];
210 struct smu7_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
H A Dvega10_hwmgr.h122 #define MAX_REGULAR_DPM_NUMBER 8 macro
136 struct vega10_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
221 struct vega10_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
286 struct phm_ppt_v1_clock_voltage_dependency_record entries[MAX_REGULAR_DPM_NUMBER];
291 struct phm_ppt_v1_voltage_lookup_record entries[MAX_REGULAR_DPM_NUMBER];
H A Dvega12_hwmgr.h95 #define MAX_REGULAR_DPM_NUMBER 16 macro
109 struct vega12_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
114 uint32_t entries[MAX_REGULAR_DPM_NUMBER];
211 struct vega12_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
284 entries[MAX_REGULAR_DPM_NUMBER];
H A Dvega20_hwmgr.h139 #define MAX_REGULAR_DPM_NUMBER 16 macro
162 struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
167 uint32_t entries[MAX_REGULAR_DPM_NUMBER];
272 struct vega20_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
347 entries[MAX_REGULAR_DPM_NUMBER];
H A Dsmu10_hwmgr.h175 #define MAX_REGULAR_DPM_NUMBER 8 macro
184 struct smu10_mclk_latency_entries entries[MAX_REGULAR_DPM_NUMBER];
H A Dsmu7_hwmgr.c664 MAX_REGULAR_DPM_NUMBER);
749 MAX_REGULAR_DPM_NUMBER);
753 SMU_MAX_LEVELS_MEMORY), MAX_REGULAR_DPM_NUMBER);
759 MAX_REGULAR_DPM_NUMBER);
763 SMU_MAX_LEVELS_VDDCI), MAX_REGULAR_DPM_NUMBER);
769 MAX_REGULAR_DPM_NUMBER);
H A Dvega12_hwmgr.c1132 PP_ASSERT_WITH_CODE(table->count <= MAX_REGULAR_DPM_NUMBER,
1134 return MAX_REGULAR_DPM_NUMBER - 1);
H A Dvega10_hwmgr.c1793 while (i < MAX_REGULAR_DPM_NUMBER) {
3584 if (table->count <= MAX_REGULAR_DPM_NUMBER) {
3591 return MAX_REGULAR_DPM_NUMBER - 1;
H A Dvega20_hwmgr.c1793 PP_ASSERT_WITH_CODE(table->count <= MAX_REGULAR_DPM_NUMBER,
1795 return MAX_REGULAR_DPM_NUMBER - 1);
/linux-master/drivers/gpu/drm/radeon/
H A Dci_dpm.h60 #define MAX_REGULAR_DPM_NUMBER 8 macro
65 struct ci_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];
H A Dci_dpm.c3337 for (i = 0; i < MAX_REGULAR_DPM_NUMBER; i++)

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