Searched refs:LSR (Results 1 - 8 of 8) sorted by path
| /haiku/src/add-ons/accelerants/nvidia/engine/ |
| H A D | nv_crtc.c | 377 CRTCW(LSR,
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| H A D | nv_crtc2.c | 363 CRTC2W(LSR,
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| /haiku/src/add-ons/accelerants/skeleton/engine/ |
| H A D | crtc.c | 251 CRTCW(LSR,
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| H A D | crtc2.c | 237 CRTC2W(LSR,
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| /haiku/src/add-ons/accelerants/via/engine/ |
| H A D | crtc2.c | 237 CRTC2W(LSR,
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| /haiku/src/add-ons/kernel/drivers/ports/pc_serial/ |
| H A D | UART.h | 25 #define LSR 5 macro
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| H A D | SerialDevice.cpp | 350 return (ReadReg8(LSR) & (LSR_THRE | LSR_TSRE)) == (LSR_THRE | LSR_TSRE);
429 // for (int count = 0; ReadReg8(LSR) & LSR_DR; count++)
477 for (i = 0; i < bytesLeft && (ReadReg8(LSR) & LSR_DR); i++) {
493 lsr = ReadReg8(LSR);
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| /haiku/src/system/boot/platform/efi/arch/arm64/ |
| H A D | cache.S | 47 LSR W3, W3, #23
52 ADD W2, W10, W10, LSR #1 // Calculate 3 x cache level
53 LSR W1, W0, W2 // extract 3-bit cache type for this level
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Completed in 86 milliseconds