Searched refs:INTEL_CX0_LANE0 (Results 1 - 1 of 1) sorted by relevance
| /linux-master/drivers/gpu/drm/i915/display/ |
| H A D | intel_cx0_phy.c | 28 #define INTEL_CX0_LANE0 BIT(0) macro
30 #define INTEL_CX0_BOTH_LANES (INTEL_CX0_LANE1 | INTEL_CX0_LANE0)
64 ? INTEL_CX0_BOTH_LANES : INTEL_CX0_LANE0;
469 u8 lane_mask = lane == 0 ? INTEL_CX0_LANE0 : INTEL_CX0_LANE1;
1875 u8 lane = INTEL_CX0_LANE0;
1919 intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_PLL(i),
1923 intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CMN(0), pll_state->cmn, MB_WRITE_COMMITTED);
1924 intel_cx0_write(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_TX(0), pll_state->tx, MB_WRITE_COMMITTED);
1926 intel_cx0_rmw(encoder, INTEL_CX0_LANE0, PHY_C10_VDR_CONTROL(1),
2168 cntx = intel_cx0_read(encoder, INTEL_CX0_LANE0, PHY_C20_VDR_CUSTOM_SERDES_RAT
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