Searched refs:IIR (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/gpu/drm/i915/
H A Di915_irq.h61 gen3_irq_reset((uncore), type##IMR, type##IIR, type##IER)
76 type##IIR)
/linux-master/drivers/gpu/drm/xe/
H A Dxe_irq.c27 * ISR, IMR, IIR, IER.
30 #define IIR(offset) XE_REG(offset + 0x8) macro
59 * be raised in the IIR.
61 assert_iir_is_zero(mmio, IIR(irqregs));
81 /* IIR can theoretically queue up two events. Be paranoid. */
82 xe_mmio_write32(mmio, IIR(irqregs), ~0);
83 xe_mmio_read32(mmio, IIR(irqregs));
84 xe_mmio_write32(mmio, IIR(irqregs), ~0);
85 xe_mmio_read32(mmio, IIR(irqregs));
112 iir = xe_mmio_read32(mmio, IIR(GU_MISC_IRQ_OFFSE
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/linux-master/arch/x86/boot/
H A Dearly_serial_console.c15 #define IIR 2 /* Interrupt ID */ macro
/linux-master/drivers/net/hamradio/
H A Dbaycom_ser_fdx.c95 #define IIR(iobase) (iobase+2) macro
258 if ((iir = inb(IIR(dev->base_addr))) & 1)
302 iir = inb(IIR(dev->base_addr));
360 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
H A Dbaycom_ser_hdx.c81 #define IIR(iobase) (iobase+2) macro
371 if ((iir = inb(IIR(dev->base_addr))) & 1)
401 iir = inb(IIR(dev->base_addr));
442 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
H A Dyam.c152 #define IIR(iobase) (iobase+2) macro
513 u = uart_tab[(inb(IIR(iobase)) >> 6) & 3];
744 while ((iir = IIR_MASK & inb(IIR(dev->base_addr))) != IIR_NOPEND) {
/linux-master/drivers/video/fbdev/
H A Di740_reg.h230 #define IIR 0x3032 macro
/linux-master/drivers/video/fbdev/i810/
H A Di810_regs.h45 #define IIR 0x020A4 macro
H A Di810_accel.c38 printk("IIR : 0x%04x\n"
43 i810_readw(IIR, mmio),
/linux-master/arch/x86/kernel/
H A Dearly_printk.c88 #define IIR 2 /* Interrupt ID */ macro
/linux-master/drivers/gpu/drm/gma500/
H A Dpsb_intel_reg.h752 #define IIR 0x020a4 macro

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