Searched refs:EMC_TIMING_CONTROL (Results 1 - 6 of 6) sorted by relevance

/linux-master/arch/arm/mach-tegra/
H A Dsleep-tegra30.S20 #define EMC_TIMING_CONTROL 0x28 define
92 str \rd, [\base, #EMC_TIMING_CONTROL]
/linux-master/drivers/memory/tegra/
H A Dtegra20-emc.c40 #define EMC_TIMING_CONTROL 0x028 macro
309 emc->regs + EMC_TIMING_CONTROL);
H A Dtegra124-emc.c51 #define EMC_TIMING_CONTROL 0x28 macro
530 writel(1, emc->regs + EMC_TIMING_CONTROL);
H A Dtegra210-emc-core.c907 emc_writel(emc, 0x1, EMC_TIMING_CONTROL);
1154 emc_writel(emc, 1, EMC_TIMING_CONTROL);
H A Dtegra30-emc.c46 #define EMC_TIMING_CONTROL 0x028 macro
403 writel_relaxed(EMC_TIMING_UPDATE, emc->regs + EMC_TIMING_CONTROL);
H A Dtegra210-emc.h35 #define EMC_TIMING_CONTROL 0x28 macro

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