Searched refs:E4 (Results 1 - 3 of 3) sorted by relevance
/linux-master/arch/powerpc/kernel/ |
H A D | align.c | 42 #define E4 0x40 /* SPE endianness is word */ macro 49 { 8, LD+E4 }, /* 0 00 01: evldw[x] */ 60 { 4, LD+E4 }, /* 0 11 00: evlwwsplat[x] */ 66 { 8, ST+E4 }, /* 1 00 01: evstdw[x] */ 77 { 4, ST+E4 }, /* 1 11 00: evstwwe[x] */ 79 { 4, ST+E4 }, /* 1 11 10: evstwwo[x] */ 232 case E4:
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/linux-master/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed-g6.c | 1407 #define E4 224 macro 1408 SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16), 1410 PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2); 1457 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1); 1824 ASPEED_PINCTRL_PIN(E4), 2619 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, E4, E1, SCU40C, 2), 2620 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, E4, E1, SCU40C, 2),
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/linux-master/drivers/media/tuners/ |
H A D | mxl5005s.c | 2312 u32 divider_val, E3, E4, E5, E5A; local 2627 /* Equation E4 CHCAL_INT_MOD_RF */ 2628 E4 = (state->RF_LO*divider_val/1000)/(2*state->Fxtal*Kdbl_RF/1000); 2629 MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, E4); 2633 (E4*(2*state->Fxtal*Kdbl_RF)/10000))) /
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