Searched refs:DSB (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/sys/arm/arm/
H A Dlocore-v6.S143 DSB
147 DSB
298 DSB
308 DSB
312 DSB
342 DSB
351 DSB
360 DSB
363 DSB
368 DSB
[all...]
H A Dcpu_asm-v6.S54 DSB
109 DSB
163 DSB
230 DSB
255 DSB
266 DSB
H A Dswtch-v6.S117 DSB
133 DSB
158 DSB
/freebsd-11-stable/sys/arm/include/
H A Dasm.h235 #define DSB dsb macro
240 #define DSB mcr CP15_CP15DSB macro
245 #define DSB mcr CP15_CP15DSB /* DSB and DMB are the */ macro
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SpeculationHardening.cpp38 // by inserting a DSB SYS/ISB barrier pair which will prevent control
220 // A full control flow speculation barrier consists of (DSB SYS + ISB)
221 BuildMI(MBB, MBBI, DL, TII->get(AArch64::DSB)).addImm(0xf);
H A DAArch64InstrInfo.cpp975 case AArch64::DSB:
977 // DSB and ISB also are scheduling barriers.
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp4749 /// parseMemBarrierOptOperand - Try to parse DSB/DMB data barrier options.
7870 case ARM::DSB:
7879 // SSBB and PSSBB (DSB #0|#4) are not predicable (pred must be AL).

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