Searched refs:DRRDisplay (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h591 bool DRRDisplay[],
684 bool DRRDisplay,
H A Ddisplay_mode_vba_util_32.c2921 bool DRRDisplay[], argument
3045 DRRDisplay[k],
3248 bool DRRDisplay,
3260 !(SynchronizeDRRDisplaysForUCLKPStateChangeFinal && DRRDisplay)) {
4499 (v->DRRDisplay[i] || v->DRRDisplay[j]))) {
3246 dml32_CalculateTWait( unsigned int PrefetchMode, enum dm_use_mall_for_pstate_change_mode UseMALLForPStateChange, bool SynchronizeDRRDisplaysForUCLKPStateChangeFinal, bool DRRDisplay, double DRAMClockChangeLatency, double FCLKChangeLatency, double UrgentLatency, double SREnterPlusExitTime) argument
H A Ddisplay_mode_vba_32.c756 mode_lib->vba.DRRDisplay[k],
3056 mode_lib->vba.DRRDisplay,
3262 mode_lib->vba.DRRDisplay[k],
/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_utils.c46 dml_timing_array->DRRDisplay[dst_index] = dml_timing_array->DRRDisplay[src_index];
H A Ddisplay_mode_core_structs.h556 dml_bool_t DRRDisplay[__DML_NUM_PLANES__]; member in struct:dml_timing_cfg_st
1214 dml_bool_t *DRRDisplay; member in struct:UseMinimumDCFCLK_params_st
1281 dml_bool_t *DRRDisplay; member in struct:CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params_st
H A Ddml2_translation_helper.c620 out->DRRDisplay[location] = false;
1021 dml_dispcfg->timing.DRRDisplay[0] = true;
1026 dml_dispcfg->timing.DRRDisplay[i] = true;
H A Ddisplay_mode_util.c539 dml_print("DML: timing_cfg: plane=%d, DRRDisplay = %d\n", i, timing->DRRDisplay[i]);
H A Ddisplay_mode_core.c278 dml_bool_t DRRDisplay,
1741 dml_bool_t DRRDisplay,
1751 !(UseMALLForPStateChange == dml_use_mall_pstate_change_phantom_pipe) && !(SynchronizeDRRDisplaysForUCLKPStateChangeFinal && DRRDisplay)) {
2980 (p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && (p->DRRDisplay[i] || p->DRRDisplay[j]))) {
2994 s->FCLKChangeSupportNumber = ((p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && p->DRRDisplay[k]) ? 2 : 1);
2996 } else if (((s->FCLKChangeSupportNumber == 1) && (p->DRRDisplay[k] || (!s->SynchronizedSurfaces[s->LastSurfaceWithoutMargin][k]))) || (s->FCLKChangeSupportNumber == 2))
3025 s->DRAMClockChangeSupportNumber = (p->SynchronizeDRRDisplaysForUCLKPStateChangeFinal && p->DRRDisplay[k]) ? 2 : 1;
3027 } else if (((s->DRAMClockChangeSupportNumber == 1) && (p->DRRDisplay[k] || !s->SynchronizedSurfaces[s->LastSurfaceWithoutMargin][k])) || (s->DRAMClockChangeSupportNumber == 2)) {
4632 p->DRRDisplay[
1735 CalculateTWait( dml_uint_t PrefetchMode, enum dml_use_mall_for_pstate_change_mode UseMALLForPStateChange, dml_bool_t SynchronizeDRRDisplaysForUCLKPStateChangeFinal, dml_bool_t DRRDisplay, dml_float_t DRAMClockChangeLatency, dml_float_t FCLKChangeLatency, dml_float_t UrgentLatency, dml_float_t SREnterPlusExitTime) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h452 bool DRRDisplay[DC__NUM_DPP__MAX]; member in struct:vba_vars_st
H A Ddisplay_mode_vba.c708 mode_lib->vba.DRRDisplay[mode_lib->vba.NumberOfActiveSurfaces] = dst->drr_display;

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