Searched refs:DRAMClockChangeSupport (Results 1 - 21 of 21) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.c132 if (p->cur_mode_support_info->DRAMClockChangeSupport[0] == dml_dram_clock_change_unsupported) {
272 if (dml_result && s->evaluation_info.DRAMClockChangeSupport[0] == dml_dram_clock_change_vactive) {
454 (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported && !force_svp)) {
485 if (s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported) {
486 if (dml2_svp_validate_static_schedulability(dml2, display_state, s->mode_support_info.DRAMClockChangeSupport[0])) {
505 if (result && s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported) {
618 out_clks.p_state_supported = s->mode_support_info.DRAMClockChangeSupport[0] != dml_dram_clock_change_unsupported;
772 *dram_clk_change_support = (unsigned int) dml2->v20.dml_core_ctx.ms.support.DRAMClockChangeSupport[0];
H A Ddisplay_mode_util.c492 if (!fail_only || support->DRAMClockChangeSupport[j] == dml_dram_clock_change_unsupported)
493 dml_print("DML: support: combine=%d, DRAMClockChangeSupport = %d\n", j, support->DRAMClockChangeSupport[j]);
H A Ddisplay_mode_core_structs.h714 enum dml_dram_clock_change_support DRAMClockChangeSupport[2]; member in struct:dml_mode_support_info_st
1194 enum dml_dram_clock_change_support DRAMClockChangeSupport; member in struct:mode_program_st
1322 enum dml_dram_clock_change_support *DRAMClockChangeSupport; member in struct:CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport_params_st
H A Ddisplay_mode_core.c3035 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive;
3037 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank;
3039 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr;
3041 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported;
3045 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_full_frame;
3047 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_w_mall_full_frame;
3049 *p->DRAMClockChangeSupport = dml_dram_clock_change_vblank_drr_w_mall_full_frame;
3051 *p->DRAMClockChangeSupport = dml_dram_clock_change_unsupported;
3055 *p->DRAMClockChangeSupport = dml_dram_clock_change_vactive_w_mall_sub_vp;
3057 *p->DRAMClockChangeSupport
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c284 enum clock_change_support temp_clock_change_support = vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb];
290 vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_support;
296 if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported &&
298 vba->DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] = temp_clock_change_support;
301 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported)
1080 } else if (vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vactive_w_mall_sub_vp &&
1484 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] != dm_dram_clock_change_unsupported) ||
1485 vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported ||
1524 if (vba->DRAMClockChangeSupport[i][vba->maxMpcComb] != dm_dram_clock_change_unsupported) {
1556 vba->DRAMClockChangeSupport[*vleve
[all...]
H A Ddisplay_mode_vba_util_32.h827 enum clock_change_support *DRAMClockChangeSupport,
H A Ddisplay_mode_vba_util_32.c4281 enum clock_change_support *DRAMClockChangeSupport,
4575 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
4577 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
4579 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
4582 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_full_frame;
4584 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_full_frame;
4586 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
4589 *DRAMClockChangeSupport = dm_dram_clock_change_vactive_w_mall_sub_vp;
4591 *DRAMClockChangeSupport = dm_dram_clock_change_vblank_w_mall_sub_vp;
4593 *DRAMClockChangeSupport
4260 dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport( struct vba_vars_st *v, unsigned int PrefetchMode, double DCFCLK, double ReturnBW, SOCParametersList mmSOCParameters, double SOCCLK, double DCFClkDeepSleep, unsigned int DETBufferSizeY[], unsigned int DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], double SwathWidthY[], double SwathWidthC[], unsigned int DPPPerSurface[], double BytePerPixelDETY[], double BytePerPixelDETC[], double DSTXAfterScaler[], double DSTYAfterScaler[], bool UnboundedRequestEnabled, unsigned int CompressedBufferSizeInkByte, enum clock_change_support *DRAMClockChangeSupport, double MaxActiveDRAMClockChangeLatencySupported[], unsigned int SubViewportLinesNeededInMALL[], enum dm_fclock_change_support *FCLKChangeSupport, double *MinActiveFCLKChangeLatencySupported, bool *USRRetrainingSupport, double ActiveDRAMClockChangeLatencyMargin[]) argument
[all...]
H A Ddisplay_mode_vba_32.c1711 || mode_lib->vba.DRAMClockChangeSupport[i][j] != dm_dram_clock_change_unsupported)
3605 &v->DRAMClockChangeSupport[i][j],
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c388 bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_change_unsupported;
417 pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] != dm_dram_clock_change_unsupported;
486 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] ==
H A Ddisplay_mode_vba_30.c345 enum clock_change_support *DRAMClockChangeSupport,
2740 enum clock_change_support DRAMClockChangeSupport = 0; // dummy local
2792 &DRAMClockChangeSupport,
5069 &v->DRAMClockChangeSupport[i][j],
5241 enum clock_change_support *DRAMClockChangeSupport,
5387 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5389 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5391 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
5191 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, unsigned int DETBufferSizeInKByte, unsigned int WritebackInterfaceBufferSize, double DCFCLK, double ReturnBW, bool GPUVMEnable, unsigned int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, unsigned int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], unsigned int DETBufferSizeY[], unsigned int DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], unsigned int LBBitPerPixel[], double SwathWidthY[], double SwathWidthC[], double HRatio[], double HRatioChroma[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], double VRatioChroma[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], double DSTXAfterScaler[], double DSTYAfterScaler[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) argument
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c471 if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[context->bw_ctx.dml.vba.VoltageLevel][context->bw_ctx.dml.vba.maxMpcComb] != dm_dram_clock_change_vactive)
562 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == dm_dram_clock_change_vactive;
H A Ddisplay_mode_vba_31.c312 enum clock_change_support *DRAMClockChangeSupport,
2945 enum clock_change_support DRAMClockChangeSupport; // dummy local
2966 &DRAMClockChangeSupport,
5376 &v->DRAMClockChangeSupport[i][j],
5574 enum clock_change_support *DRAMClockChangeSupport,
5738 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5741 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5743 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
5555 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, double DCFCLK, double ReturnBW, double UrgentLatency, double ExtraLatency, double SOCCLK, double DCFCLKDeepSleep, unsigned int DETBufferSizeY[], unsigned int DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], double SwathWidthY[], double SwathWidthC[], unsigned int DPPPerPlane[], double BytePerPixelDETY[], double BytePerPixelDETC[], bool UnboundedRequestEnabled, int unsigned CompressedBufferSizeInkByte, enum clock_change_support *DRAMClockChangeSupport, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *Z8StutterExitWatermark, double *Z8StutterEnterPlusExitWatermark) argument
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_mode_vba_21.c334 enum clock_change_support *DRAMClockChangeSupport,
2416 enum clock_change_support DRAMClockChangeSupport; // dummy local
2466 &DRAMClockChangeSupport,
5036 &locals->DRAMClockChangeSupport[i][j],
5203 && ((locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vactive
5204 && locals->DRAMClockChangeSupport[i][0] != dm_dram_clock_change_vactive)
5205 || (locals->DRAMClockChangeSupport[i][1] == dm_dram_clock_change_vblank
5206 && locals->DRAMClockChangeSupport[i][0] == dm_dram_clock_change_unsupported))))) {
5291 enum clock_change_support *DRAMClockChangeSupport,
5498 *DRAMClockChangeSupport
5242 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, unsigned int NumberOfActivePlanes, unsigned int MaxLineBufferLines, unsigned int LineBufferSize, unsigned int DPPOutputBufferPixels, unsigned int DETBufferSizeInKByte, unsigned int WritebackInterfaceLumaBufferSize, unsigned int WritebackInterfaceChromaBufferSize, double DCFCLK, double UrgentOutOfOrderReturn, double ReturnBW, bool GPUVMEnable, int dpte_group_bytes[], unsigned int MetaChunkSize, double UrgentLatency, double ExtraLatency, double WritebackLatency, double WritebackChunkSize, double SOCCLK, double DRAMClockChangeLatency, double SRExitTime, double SREnterPlusExitTime, double DCFCLKDeepSleep, int DPPPerPlane[], bool DCCEnable[], double DPPCLK[], double SwathWidthSingleDPPY[], unsigned int SwathHeightY[], double ReadBandwidthPlaneLuma[], unsigned int SwathHeightC[], double ReadBandwidthPlaneChroma[], unsigned int LBBitPerPixel[], double SwathWidthY[], double HRatio[], unsigned int vtaps[], unsigned int VTAPsChroma[], double VRatio[], unsigned int HTotal[], double PixelClock[], unsigned int BlendingAndTiming[], double BytePerPixelDETY[], double BytePerPixelDETC[], bool WritebackEnable[], enum source_format_class WritebackPixelFormat[], double WritebackDestinationWidth[], double WritebackDestinationHeight[], double WritebackSourceHeight[], enum clock_change_support *DRAMClockChangeSupport, double *UrgentWatermark, double *WritebackUrgentWatermark, double *DRAMClockChangeWatermark, double *WritebackDRAMClockChangeWatermark, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *MinActiveDRAMClockChangeLatencySupported) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h847 enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES][2]; member in struct:vba_vars_st
/linux-master/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c511 if (vba->DRAMClockChangeSupport[vba->VoltageLevel][vba->maxMpcComb] !=
/linux-master/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_resource_helpers.c737 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_vblank_w_mall_sub_vp)
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_mode_vba_20v2.c2649 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
2652 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
2659 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank;
2662 mode_lib->vba.DRAMClockChangeSupport[0][0] =
2667 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported;
2673 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0];
H A Ddisplay_mode_vba_20.c2584 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
2587 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vblank;
2590 mode_lib->vba.DRAMClockChangeSupport[0][0] =
2595 mode_lib->vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_unsupported;
2600 mode_lib->vba.DRAMClockChangeSupport[k][j] = mode_lib->vba.DRAMClockChangeSupport[0][0];
H A Ddcn20_fpu.c1164 context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb]
/linux-master/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_mode_vba_314.c324 enum clock_change_support *DRAMClockChangeSupport,
2966 enum clock_change_support DRAMClockChangeSupport; // dummy local
2988 &DRAMClockChangeSupport,
5465 &v->DRAMClockChangeSupport[i][j],
5671 enum clock_change_support *DRAMClockChangeSupport,
5835 *DRAMClockChangeSupport = dm_dram_clock_change_vactive;
5838 *DRAMClockChangeSupport = dm_dram_clock_change_vblank;
5840 *DRAMClockChangeSupport = dm_dram_clock_change_unsupported;
5652 CalculateWatermarksAndDRAMSpeedChangeSupport( struct display_mode_lib *mode_lib, unsigned int PrefetchMode, double DCFCLK, double ReturnBW, double UrgentLatency, double ExtraLatency, double SOCCLK, double DCFCLKDeepSleep, unsigned int DETBufferSizeY[], unsigned int DETBufferSizeC[], unsigned int SwathHeightY[], unsigned int SwathHeightC[], double SwathWidthY[], double SwathWidthC[], unsigned int DPPPerPlane[], double BytePerPixelDETY[], double BytePerPixelDETC[], bool UnboundedRequestEnabled, unsigned int CompressedBufferSizeInkByte, enum clock_change_support *DRAMClockChangeSupport, double *StutterExitWatermark, double *StutterEnterPlusExitWatermark, double *Z8StutterExitWatermark, double *Z8StutterEnterPlusExitWatermark) argument
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c1651 context->bw_ctx.dml.vba.DRAMClockChangeSupport[0][0] = dm_dram_clock_change_vactive;
1677 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported)) {

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