Searched refs:DC_HPD_CONTROL (Results 1 - 7 of 7) sorted by relevance
| /linux-master/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.h | 45 SRI(DC_HPD_CONTROL, HPD, id)
143 uint32_t DC_HPD_CONTROL; member in struct:dce110_link_enc_hpd_registers
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| H A D | dce_link_encoder.c | 1642 uint32_t addr = HPD_REG(DC_HPD_CONTROL);
1646 hpd_enable = get_reg_field_value(hpd_enable, DC_HPD_CONTROL, DC_HPD_EN);
1649 set_reg_field_value(value, 1, DC_HPD_CONTROL, DC_HPD_EN);
1656 uint32_t addr = HPD_REG(DC_HPD_CONTROL);
1659 set_reg_field_value(value, 0, DC_HPD_CONTROL, DC_HPD_EN);
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| /linux-master/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_link_encoder.h | 40 SRI(DC_HPD_CONTROL, HPD, id)
81 uint32_t DC_HPD_CONTROL; member in struct:dcn10_link_enc_hpd_registers
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| H A D | dcn10_link_encoder.c | 1379 HPD_REG_UPDATE(DC_HPD_CONTROL,
1387 HPD_REG_UPDATE(DC_HPD_CONTROL,
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| /linux-master/drivers/gpu/drm/amd/amdgpu/ |
| H A D | dce_v11_0.c | 380 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
422 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0);
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| H A D | dce_v10_0.c | 356 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 1);
399 tmp = REG_SET_FIELD(tmp, DC_HPD_CONTROL, DC_HPD_EN, 0);
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| /linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.h | 312 #define HPD_REG_LIST_RI(id) SRI_ARR(DC_HPD_CONTROL, HPD, id)
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