Searched refs:CVMX_CIU_PP_RST (Results 1 - 2 of 2) sorted by relevance

/linux-master/arch/mips/cavium-octeon/
H A Dsmp.c339 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
340 cvmx_write_csr(CVMX_CIU_PP_RST, 0);
388 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid);
389 cvmx_write_csr(CVMX_CIU_PP_RST, 0);
/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-ciu-defs.h32 #define CVMX_CIU_PP_RST CVMX_CIU_ADDR(0x0700, 0, 0x00, 0) macro

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