History log of /linux-master/arch/mips/include/asm/octeon/cvmx-ciu-defs.h
Revision Date Author Comments
# cfe18244 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Simplify CIU register functions.

Collapse and simplify switch statements in functions.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19713/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# a730c7cd 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Create simple macro for CIU registers.

Create new CVMX_CIU_ADDR macro to improve readability.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19712/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# c39f8ecf 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Remove all unused CIU macros.

Get rid of all unused CIU macros and sort them. Verified with
'make allyesconfig' build test.

[paul.burton@mips.com:
- Also checked via convoluted grep invocation for use of all removed
macros within arch/mips/ & drivers/.]

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19710/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# 9609e3e9 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Convert CIU types to use bitfields.

Convert remaining structures to use __BITFIELD_FIELD macro. Also
straighten up the description text and whitespace.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19709/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# 769f4372 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Unify QLM data types in CIU header.

Data types 'cvmx_ciu_qlm0' and 'cvmx_ciu_qlm1' are identical in
their usage and structure. Combine them and update the PCIe code.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19708/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# 67701aea 03-Jul-2018 Steven J. Hill <steven.hill@cavium.com>

MIPS: Octeon: Remove unused CIU types.

Remove all unused data types. Verified with a 'make allyesconfig'
and Cavium platform.

[paul.burton@mips.com:
- Also checked via convoluted grep invocation for use of all removed
structs & unions within arch/mips/ & drivers/.]

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19711/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva <cchavva@caviumnetworks.com>


# 1fb6e539 29-Aug-2017 Steven J. Hill <Steven.Hill@cavium.com>

MIPS: Octeon: Watchdog registers for 70xx, 73xx, 78xx, F75xx.

Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-watchdog@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17208/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# c5aa59e8 03-Apr-2012 David Daney <david.daney@cavium.com>

MIPS: OCTEON: Update register definitions.

Add support for cn68xx, cn61xx, cn63xx, cn66xx and cnf71XX.

Add little-endian register layouts.

Patch cvmx-interrupt-rsl.c for changed definition.

Signed-off-by: David Daney <david.daney@cavium.com>


# aa32a955 07-Oct-2010 David Daney <ddaney@caviumnetworks.com>

MIPS: Octeon: Update register definitions for CN63XX chips

The CN63XX is a new 6-CPU SOC based on the new OCTEON II CPU cores.

Join some lines back together. This makes some of them exceed 80
columns, but they are uninteresting and this unclutters things.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>


# 54293ec3 11-Dec-2008 David Daney <ddaney@caviumnetworks.com>

MIPS: Add Cavium OCTEON processor CSR definitions

Here we define the addresses and bit-fields of the Configuration and
Status Registers (CSRs) for some of the hardware functional units on
the OCTEON SOC.

Definitions are needed for:

CIU -- Central Interrupt Unit.
GPIO -- General Purpose Input Output.
IOB -- Input / Output {Busing,Bridge}.
IPD -- Input Packet Data unit.
L2C -- Level-2 Cache controller.
L2D -- Level-2 Data cache.
L2T -- Level-2 cache Tag.
LED -- Light Emitting Diode controller.
MIO -- Miscellaneous Input / Output.
POW -- Packet Order / Work unit.

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>