Searched refs:CR (Results 1 - 25 of 26) sorted by relevance

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/linux-master/drivers/staging/rtl8712/
H A Drtl8712_cmdctrl_regdef.h10 #define CR (RTL8712_CMDCTRL_ + 0x0000) macro
H A Dusb_halinit.c90 r8712_write8(adapter, CR, val8);
92 r8712_write8(adapter, CR + 1, val8);
154 r8712_write8(adapter, CR, 0xFC);
155 r8712_write8(adapter, CR + 1, 0x37);
250 r8712_write8(adapter, CR, 0xFC);
251 r8712_write8(adapter, CR + 1, 0x37);
271 val8 = r8712_read8(adapter, CR);
272 r8712_write8(adapter, CR, val8 & (~_TXDMA_EN));
275 r8712_write8(adapter, CR, val8 | _TXDMA_EN);
/linux-master/arch/arm/mach-spear/
H A Dtime.c36 #define CR(x) ((x) * 0x80 + 0x80) macro
75 writew(CTRL_PRESCALER256, gpt_base + CR(CLKSRC));
83 val = readw(gpt_base + CR(CLKSRC));
86 writew(val, gpt_base + CR(CLKSRC));
95 u16 val = readw(gpt_base + CR(CLKEVT));
99 writew(val, gpt_base + CR(CLKEVT));
116 val = readw(gpt_base + CR(CLKEVT));
118 writew(val, gpt_base + CR(CLKEVT));
135 val = readw(gpt_base + CR(CLKEVT));
138 writew(val, gpt_base + CR(CLKEV
[all...]
/linux-master/arch/powerpc/xmon/
H A Dppc-opc.c272 #define CR B24 + 1
276 #define CRB CR + 1
1130 in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000
3898 {"bge-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
3899 {"bge+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
3900 {"bge", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
3901 {"bnl-", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDM}},
3902 {"bnl+", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BDP}},
3903 {"bnl", BBOCB(16,BOF,CBLT,0,0), BBOATCB_MASK, COM, PPCVLE, {CR, BD}},
3904 {"bgel-", BBOCB(16,BOF,CBLT,0,1), BBOATCB_MASK, PPCCOM, PPCVLE, {CR, BD
270 #define CR macro
[all...]
/linux-master/drivers/video/fbdev/sis/
H A Dinitextlfb.c116 (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
199 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
200 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
203 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
204 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
205 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
H A Dvstruct.h99 unsigned char CR[15]; member in struct:SiS_LVDSCRT1Data
173 unsigned char CR[12]; member in struct:SiS_Part2PortTbl
177 unsigned char CR[17]; member in struct:SiS_CRT1Table
H A Dinit301.c1310 if(SiS_Pr->ChipType >= SIS_661) { /* New CR layout */
3358 tempax = SiS_Pr->SiS_CRT1Table[index].CR[0];
3359 tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8);
3361 tempbx = SiS_Pr->SiS_CRT1Table[index].CR[6];
3362 tempcx = SiS_Pr->SiS_CRT1Table[index].CR[13] << 8;
3366 temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7];
6371 cr4 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[4];
6372 cr14 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
6373 cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5];
6374 cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[1
[all...]
H A Dinit.c2092 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
/linux-master/drivers/usb/misc/sisusbvga/
H A Dsisusb_struct.h112 unsigned char CR[17]; member in struct:SiS_CRT1Table
/linux-master/arch/arm/mach-rpc/
H A Ddma.c51 #define CR (IOMD_IO0CR - IOMD_IO0CURA) macro
181 writeb(DMA_CR_C, base + CR);
188 writeb(ctrl, base + CR);
201 writeb(0, base + CR);
/linux-master/drivers/net/usb/
H A Drtl8150.c23 #define CR 0x012e macro
289 /* Get the CR contents. */
290 get_registers(dev, CR, 1, &cr);
293 set_registers(dev, CR, 1, &cr);
302 set_registers(dev, CR, 1, &cr);
313 set_registers(dev, CR, 1, &data);
315 get_registers(dev, CR, 1, &data);
631 set_registers(dev, CR, 1, &cr);
641 get_registers(dev, CR, 1, &cr);
643 set_registers(dev, CR,
[all...]
/linux-master/arch/powerpc/kernel/
H A Dswsusp_asm64.S85 SAVE_SPECIAL(CR)
186 RESTORE_SPECIAL(CR)
/linux-master/net/ethtool/
H A Dcommon.c143 __DEFINE_LINK_MODE_NAME(25000, CR, Full),
154 __DEFINE_LINK_MODE_NAME(10000, CR, Full),
166 __DEFINE_LINK_MODE_NAME(50000, CR, Full),
191 __DEFINE_LINK_MODE_NAME(100000, CR, Full),
306 __DEFINE_LINK_MODE_PARAMS(25000, CR, Full),
317 __DEFINE_LINK_MODE_PARAMS(10000, CR, Full),
329 __DEFINE_LINK_MODE_PARAMS(50000, CR, Full),
354 __DEFINE_LINK_MODE_PARAMS(100000, CR, Full),
/linux-master/sound/soc/atmel/
H A Datmel_ssc_dai.c291 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
363 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
727 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
755 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable);
758 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
777 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS));
819 ssc_writel(ssc_p->ssc->regs, CR, cr);
/linux-master/tools/testing/selftests/powerpc/switch_endian/
H A Dcheck.S19 lis r9,0x00FF # check CR
/linux-master/drivers/iommu/
H A Dmsm_iommu_hw-8xxx.h93 #define SET_CR(b, v) SET_GLOBAL_REG(CR, (b), (v))
109 #define GET_CR(b) GET_GLOBAL_REG(CR, (b))
204 /* CR */
205 #define SET_RPUE(b, v) SET_GLOBAL_FIELD(b, CR, RPUE, v)
206 #define SET_RPUERE(b, v) SET_GLOBAL_FIELD(b, CR, RPUERE, v)
207 #define SET_RPUEIE(b, v) SET_GLOBAL_FIELD(b, CR, RPUEIE, v)
208 #define SET_DCDEE(b, v) SET_GLOBAL_FIELD(b, CR, DCDEE, v)
209 #define SET_CLIENTPD(b, v) SET_GLOBAL_FIELD(b, CR, CLIENTPD, v)
210 #define SET_STALLD(b, v) SET_GLOBAL_FIELD(b, CR, STALLD, v)
211 #define SET_TLBLKCRWE(b, v) SET_GLOBAL_FIELD(b, CR, TLBLKCRW
812 #define CR macro
[all...]
/linux-master/drivers/spi/
H A Dspi-atmel.c55 /* Bitfields in CR */
311 * - CR.LASTXFER
476 spi_writel(as, CR, SPI_BIT(LASTXFER));
704 spi_writel(as, CR, SPI_BIT(RXFCLR) | SPI_BIT(TXFCLR));
1497 spi_writel(as, CR, SPI_BIT(SWRST));
1498 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
1502 spi_writel(as, CR, SPI_BIT(FIFOEN));
1513 spi_writel(as, CR, SPI_BIT(SPIEN));
1665 spi_writel(as, CR, SPI_BIT(SWRST));
1666 spi_writel(as, CR, SPI_BI
[all...]
H A Dspi-at91-usart.c436 at91_usart_spi_writel(aus, CR, US_ENABLE);
448 at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE);
465 at91_usart_spi_writel(aus, CR, US_RESET | US_DISABLE);
/linux-master/sound/spi/
H A Dat73c213.c855 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
869 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
1020 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
1084 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
1105 ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
/linux-master/drivers/media/pci/solo6x10/
H A Dsolo6x10-regs.h262 #define SOLO_VO_NA_COLOR_CR(CR) (((CR)/16)<<0)
/linux-master/drivers/net/wan/
H A Dwanxlfw.S105 CR = REGBASE + 0x5C0 // 16-bit Command register define
179 99: btstl #0, CR
420 movew %d1, CR // Init SCC RX and TX params
/linux-master/drivers/iio/adc/
H A Dat91-sama5d2_adc.c40 u16 CR; member in struct:at91_adc_reg_layout
255 .CR = 0x00,
290 .CR = 0x00,
1542 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START);
1782 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_START);
2160 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST);
2525 at91_adc_writel(st, CR, AT91_SAMA5D2_CR_SWRST);
/linux-master/drivers/net/ethernet/natsemi/
H A Dns83820.c308 #define CR 0x00 macro
455 #define __kick_rx(dev) writel(CR_RXE, dev->base + CR)
950 writel(CR_TXE, dev->base + CR);
1448 writel(CR_RXE, dev->base + CR);
1518 writel(which, dev->base + CR);
1521 } while (readl(dev->base + CR) & which);
/linux-master/fs/gfs2/
H A Dtrace_gfs2.h25 dlm_state_name(CR), \
/linux-master/drivers/tty/
H A Dn_gsm.c366 #define CR 0x02 macro
1110 *--dp = (msg->addr << 2) | CR | EA;
1461 msg->data[0] = (cmd << 1) | CR | EA; /* Set C/R */
2053 * @command: command to send including CR bit

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