Searched refs:CLK_HW_INIT (Results 1 - 25 of 37) sorted by relevance

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/linux-master/drivers/clk/actions/
H A D	owl-fixed-factor.h	20 .hw.init = CLK_HW_INIT(_name, \
H A D	owl-composite.h	59 .hw.init = CLK_HW_INIT(_name, \ 90 .hw.init = CLK_HW_INIT(_name, \
H A D	owl-factor.h	51 .hw.init = CLK_HW_INIT(_name, \
H A D	owl-divider.h	45 .hw.init = CLK_HW_INIT(_name, \
H A D	owl-gate.h	40 .hw.init = CLK_HW_INIT(_name, \
H A D	owl-pll.h	63 .hw.init = CLK_HW_INIT(_name, \
/linux-master/arch/arm/mach-omap1/
H A D	clock_data.c	82 .hw.init = CLK_HW_INIT("ck_dpll1", "ck_ref", &omap1_clk_rate_ops, 96 .hw.init = CLK_HW_INIT("ck_dpll1out", "ck_dpll1", &omap1_clk_gate_ops, 0), 106 .hw.init = CLK_HW_INIT("ck_sossi", "ck_dpll1out", &omap1_clk_full_ops, 0), 117 .hw.init = CLK_HW_INIT("arm_ck", "ck_dpll1", &omap1_clk_rate_ops, 0), 126 .hw.init = CLK_HW_INIT("armper_ck", "ck_dpll1", &omap1_clk_full_ops, 145 .hw.init = CLK_HW_INIT("ick", "ck_dpll1", &omap1_clk_gate_ops, CLK_IS_CRITICAL), 153 .hw.init = CLK_HW_INIT("armxor_ck", "ck_ref", &omap1_clk_gate_ops, 165 .hw.init = CLK_HW_INIT("armtim_ck", "ck_ref", &omap1_clk_gate_ops, 177 .hw.init = CLK_HW_INIT("armwdt_ck", "ck_ref", &omap1_clk_full_ops, 0), 189 .hw.init = CLK_HW_INIT("arminth_c [all...]
/linux-master/drivers/clk/sunxi-ng/
H A D	ccu_phase.h	26 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu_nk.h	47 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu_nm.h	54 .hw.init = CLK_HW_INIT(_name, \ 78 .hw.init = CLK_HW_INIT(_name, \ 104 .hw.init = CLK_HW_INIT(_name, \ 134 .hw.init = CLK_HW_INIT(_name, \ 193 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu_mult.h	54 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu_nkm.h	69 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu_nkmp.h	50 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu-sun8i-a83t.c	44 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M", 58 .hw.init = CLK_HW_INIT("pll-c1cpux", "osc24M", 92 .hw.init = CLK_HW_INIT("pll-audio", "osc24M", 109 .hw.init = CLK_HW_INIT("pll-video0", "osc24M", 125 .hw.init = CLK_HW_INIT("pll-ve", "osc24M", 141 .hw.init = CLK_HW_INIT("pll-ddr", "osc24M", 157 .hw.init = CLK_HW_INIT("pll-periph", "osc24M", 173 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M", 189 .hw.init = CLK_HW_INIT("pll-hsic", "osc24M", 205 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu-sun50i-h616.c	44 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M", 60 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M", 75 .hw.init = CLK_HW_INIT("pll-ddr1", "osc24M", 92 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M", 109 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M", 124 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M", 146 .hw.init = CLK_HW_INIT("pll-video0", "osc24M", 164 .hw.init = CLK_HW_INIT("pll-video1", "osc24M", 182 .hw.init = CLK_HW_INIT("pll-video2", "osc24M", 197 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu-sun50i-a100.c	50 .hw.init = CLK_HW_INIT("pll-cpux", "dcxo24M", 66 .hw.init = CLK_HW_INIT("pll-ddr0", "dcxo24M", 84 .hw.init = CLK_HW_INIT("pll-periph0", "dcxo24M", 101 .hw.init = CLK_HW_INIT("pll-periph1", "dcxo24M", 117 .hw.init = CLK_HW_INIT("pll-gpu", "dcxo24M", 137 .hw.init = CLK_HW_INIT("pll-video0", "dcxo24M", 153 .hw.init = CLK_HW_INIT("pll-video1", "dcxo24M", 169 .hw.init = CLK_HW_INIT("pll-video2", "dcxo24M", 184 .hw.init = CLK_HW_INIT("pll-ve", "dcxo24M", 210 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu-sun9i-a80.c	43 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M", 57 .hw.init = CLK_HW_INIT("pll-c1cpux", "osc24M", 79 .hw.init = CLK_HW_INIT("pll-audio", "osc24M", 95 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M", 111 .hw.init = CLK_HW_INIT("pll-ve", "osc24M", 127 .hw.init = CLK_HW_INIT("pll-ddr", "osc24M", 142 .hw.init = CLK_HW_INIT("pll-video0", "osc24M", 158 .hw.init = CLK_HW_INIT("pll-video1", "osc24M", 174 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M", 190 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu_gate.h	24 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu-sun50i-h6.c	42 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M", 58 .hw.init = CLK_HW_INIT("pll-ddr0", "osc24M", 75 .hw.init = CLK_HW_INIT("pll-periph0", "osc24M", 92 .hw.init = CLK_HW_INIT("pll-periph1", "osc24M", 107 .hw.init = CLK_HW_INIT("pll-gpu", "osc24M", 129 .hw.init = CLK_HW_INIT("pll-video0", "osc24M", 147 .hw.init = CLK_HW_INIT("pll-video1", "osc24M", 162 .hw.init = CLK_HW_INIT("pll-ve", "osc24M", 177 .hw.init = CLK_HW_INIT("pll-de", "osc24M", 192 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu_div.h	96 .hw.init = CLK_HW_INIT(_name, \ 203 .hw.init = CLK_HW_INIT(_name, \
H A D	ccu-sun4i-a10.c	38 .hw.init = CLK_HW_INIT("pll-core", 73 .hw.init = CLK_HW_INIT("pll-audio-base", 91 .hw.init = CLK_HW_INIT("pll-video0", 106 .hw.init = CLK_HW_INIT("pll-ve", 119 .hw.init = CLK_HW_INIT("pll-ve", 132 .hw.init = CLK_HW_INIT("pll-ddr-base", 146 .hw.init = CLK_HW_INIT("pll-ddr-other", "pll-ddr-base", 158 .hw.init = CLK_HW_INIT("pll-periph-base", 177 .hw.init = CLK_HW_INIT("pll-periph-sata", 193 .hw.init = CLK_HW_INIT("pl [all...]
H A D	ccu-sun50i-a100-r.c	54 .hw.init = CLK_HW_INIT("r-apb1",
/linux-master/drivers/clk/stm32/
H A D	clk-stm32mp13.c	648 .hw.init = CLK_HW_INIT("tim2_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 653 .hw.init = CLK_HW_INIT("tim3_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 658 .hw.init = CLK_HW_INIT("tim4_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 663 .hw.init = CLK_HW_INIT("tim5_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 668 .hw.init = CLK_HW_INIT("tim6_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 673 .hw.init = CLK_HW_INIT("tim7_k", "timg1_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 678 .hw.init = CLK_HW_INIT("tim1_k", "timg2_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 683 .hw.init = CLK_HW_INIT("tim8_k", "timg2_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 688 .hw.init = CLK_HW_INIT("tim12_k", "timg3_ck", &clk_stm32_gate_ops, CLK_SET_RATE_PARENT), 693 .hw.init = CLK_HW_INIT("tim13_ [all...]
/linux-master/drivers/clk/sprd/
H A D	div.h	55 _shift, _width, _flags, CLK_HW_INIT)
H A D	pll.h	90 _fflag, _fvco, CLK_HW_INIT)

Completed in 380 milliseconds

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Indexes created Thu May 02 11:06:28 MDT 2024