Searched refs:BIT27 (Results 1 - 10 of 10) sorted by relevance

/linux-master/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h58 #define BIT27 0x08000000 macro
/linux-master/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h195 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */
217 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
H A Dosdep_service.h44 #define BIT27 0x08000000 macro
H A Dhal_com_reg.h688 #define IMR_BCNDMAINT2 BIT27 /* Beacon DMA Interrupt 2 */
735 #define RCR_APP_BA_SSN BIT27 /* SSN of previous TXBA is appended as after original RXDESC as the 4-th DW of RXDESC. */
1297 #define SDIO_HIMR_CTWEND_MSK BIT27
1319 #define SDIO_HISR_CTWEND BIT27
/linux-master/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h384 #define IMR_GTINT3_8723B BIT27 /* When GTIMER3 expires, this bit is set to 1 */
406 #define IMR_BCNDMAINT7_8723B BIT27 /* Beacon DMA Interrupt 7 */
H A Drtl8723b_phycfg.c657 PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
H A DHalPhyRf_8723B.c642 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
922 !(regEAC & BIT27) && /* if Tx is OK, check whether Rx is OK */
/linux-master/include/uapi/linux/
H A Dsynclink.h46 #define BIT27 0x08000000 macro
/linux-master/drivers/scsi/
H A Ddc395x.h49 #define BIT27 0x08000000 macro
/linux-master/drivers/scsi/lpfc/
H A Dlpfc_hw4.h794 #define LPFC_SLI4_INTR27 BIT27

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