Searched refs:BIT15 (Results 1 - 11 of 11) sorted by relevance

/linux-master/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h46 #define BIT15 0x00008000 macro
/linux-master/drivers/staging/rtl8723bs/include/
H A Drtl8723b_spec.h201 #define IMR_HSISR_IND_ON_INT_8723B BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
229 #define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrupt 2 */
H A Dosdep_service.h32 #define BIT15 0x00008000 macro
H A Dhal_com_reg.h562 #define RRSR_MCS3 BIT15
644 #define CAM_VALID BIT15
700 #define IMR_TXFOVW BIT15 /* Transmit FIFO Overflow */
718 #define IMR_TSF_BIT32_TOGGLE BIT15
747 #define RCR_RSVD_BIT15 BIT15 /* Reserved */
/linux-master/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h390 #define IMR_HSISR_IND_ON_INT_8723B BIT15 /* HSISR Indicator (HSIMR & HSISR is true, this bit is set to 1) */
418 #define IMR_BCNDOK2_8723B BIT15 /* Beacon Queue DMA OK Interrupt 2 */
H A Dhal_com.c981 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
/linux-master/include/uapi/linux/
H A Dsynclink.h34 #define BIT15 0x8000 macro
/linux-master/drivers/scsi/
H A Ddc395x.h61 #define BIT15 0x00008000 macro
/linux-master/drivers/tty/
H A Dsynclink_gt.c190 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)
2045 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8));
4120 val = BIT15 + BIT14 + BIT0;
4172 val |= BIT15 + BIT13;
4175 case MGSL_MODE_BISYNC: val |= BIT15; break;
4247 val |= BIT15 + BIT13;
4250 case MGSL_MODE_BISYNC: val |= BIT15; break;
4356 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dreg.h373 #define RRSR_MCS3 BIT15
/linux-master/drivers/scsi/lpfc/
H A Dlpfc_hw4.h782 #define LPFC_SLI4_INTR15 BIT15

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