Searched refs:AUX_DPHY_RX_CONTROL1 (Results 1 - 6 of 6) sorted by relevance

/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_link_encoder.h42 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
139 uint32_t AUX_DPHY_RX_CONTROL1; member in struct:dce110_link_enc_aux_registers
H A Ddce_aux.h40 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \
59 uint32_t AUX_DPHY_RX_CONTROL1; member in struct:dce110_aux_registers
H A Ddce_aux.c477 REG_GET_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, &prev_length, AUX_RX_TIMEOUT_LEN_MUL, &prev_mult);
497 REG_UPDATE_SEQ_2(AUX_DPHY_RX_CONTROL1, AUX_RX_TIMEOUT_LEN, length, AUX_RX_TIMEOUT_LEN_MUL, multiplier);
/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_link_encoder.h37 SRI(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
77 uint32_t AUX_DPHY_RX_CONTROL1; member in struct:dcn10_link_enc_aux_registers
/linux-master/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_link_encoder.c339 AUX_REG_WRITE(AUX_DPHY_RX_CONTROL1, enc->ctx->dc_bios->golden_table.aux_dphy_rx_control1_val);
/linux-master/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h306 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id)
560 SRI_ARR(AUX_DPHY_RX_CONTROL1, DP_AUX, id), \

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