Searched refs:AR_MCAST_FIL1 (Results 1 - 11 of 11) sorted by relevance
| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211_recv.c | 113 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
127 val = OS_REG_READ(ah, AR_MCAST_FIL1);
128 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
147 val = OS_REG_READ(ah, AR_MCAST_FIL1);
148 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
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| H A D | ar5211reg.h | 257 #define AR_MCAST_FIL1 0x8044 /* multicast filter upper 32 bits */ macro
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5210/ |
| H A D | ar5210_recv.c | 112 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
126 val = OS_REG_READ(ah, AR_MCAST_FIL1);
127 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
146 val = OS_REG_READ(ah, AR_MCAST_FIL1);
147 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
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| H A D | ar5210reg.h | 90 #define AR_MCAST_FIL1 0x8054 /* Upper 16bits of mcast filter mask */ macro
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| H A D | ar5210_reset.c | 193 OS_REG_WRITE(ah, AR_MCAST_FIL1, 0); /* XXX was 2 */
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_recv.c | 122 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
136 val = OS_REG_READ(ah, AR_MCAST_FIL1);
137 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
156 val = OS_REG_READ(ah, AR_MCAST_FIL1);
157 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
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| H A D | ar5212reg.h | 272 #define AR_MCAST_FIL1 0x8044 /* MAC multicast filter upper 32 bits */ macro
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| /haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/ |
| H A D | ar9300_recv.c | 203 OS_REG_WRITE(ah, AR_MCAST_FIL1, filter1);
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| H A D | ar9300_freebsd.c | 904 val = OS_REG_READ(ah, AR_MCAST_FIL1);
905 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val &~ (1<<(ix-32))));
924 val = OS_REG_READ(ah, AR_MCAST_FIL1);
925 OS_REG_WRITE(ah, AR_MCAST_FIL1, (val | (1<<(ix-32))));
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| H A D | ar9300_power.c | 45 val = OS_REG_READ(ah, AR_MCAST_FIL1);
47 OS_REG_WRITE(ah, AR_MCAST_FIL1, val);
65 reg = high32 ? AR_MCAST_FIL1 : AR_MCAST_FIL0;
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| H A D | ar9300reg.h | 1458 #define AR_MCAST_FIL1 AR_MAC_PCU_OFFSET(MAC_PCU_MCAST_FILTER_U32) macro
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