Searched refs:AR_INTR_ASYNC_ENABLE (Results 1 - 7 of 7) sorted by relevance

/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5416/
H A Dar5416_gpio.c219 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),
221 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
258 val = MS(OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE),
260 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE,
H A Dar5416_interrupts.c281 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 0);
282 (void) OS_REG_READ(ah, AR_INTR_ASYNC_ENABLE);
367 OS_REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, mask);
H A Dar5416reg.h46 #define AR_INTR_ASYNC_ENABLE 0x403c /* enable interrupts */ macro
/haiku/src/add-ons/kernel/drivers/network/wlan/atheroswifi/contrib/ath_hal/ar9300/
H A Dar9300_interrupts.c528 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE), 0);
530 (void) OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE));
687 OS_REG_WRITE(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE), mask);
H A Dar9300_gpio.c438 regs[0] = AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE);
621 "AR_INTR_ASYNC_ENABLE: 0x%08X\n",
622 OS_REG_READ(ah, AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE)));
H A Dar9300.h734 u_int32_t AR_INTR_ASYNC_ENABLE; member in struct:ath_hal_9300::__anon10
H A Dar9300_attach.c4136 AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE) =
4243 AR_HOSTIF_REG(ah, AR_INTR_ASYNC_ENABLE) =

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