Searched refs:A5 (Results 1 - 25 of 31) sorted by relevance

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/linux-master/arch/s390/crypto/
H A Dchacha-s390.S465 #define A5 %v20 define
504 VLR A5,K0
531 VAF A5,A5,B5
537 VX D5,D5,A5
569 VAF A5,A5,B5
575 VX D5,D5,A5
626 VAF A5,A5,B
[all...]
/linux-master/arch/m68k/fpsp040/
H A Dslogn.S388 |--U + V*(A1+U*(A2+U*(A3+U*(A4+U*(A5+U*A6))))) WHICH IS
389 |--[U + V*(A1+V*(A3+V*A5))] + [U*V*(A2+V*(A4+V*A6))]
395 fmuld LOGA5,%fp2 | ...V*A5
398 faddd LOGA3,%fp2 | ...A3+V*A5
401 fmulx %fp3,%fp2 | ...V*(A3+V*A5)
404 faddd LOGA1,%fp2 | ...A1+V*(A3+V*A5)
408 fmulx %fp3,%fp2 | ...V*(A1+V*(A3+V*A5)), FP3 RELEASED
411 faddx %fp2,%fp0 | ...U+V*(A1+V*(A3+V*A5)), FP2 RELEASED
H A Dsetox.S128 | p = R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
130 | made as "short" as possible: A1 (which is 1/2), A4 and A5
138 | [ S*(A1 + S*(A3 + S*A5)) ]
248 | p = R+R*R*(A1+R*(A2+R*(A3+R*(A4+R*(A5+R*A6)))))
250 | made as "short" as possible: A1 (which is 1/2), A5 and A6
258 | [ R + S*(A1 + S*(A3 + S*A5)) ]
513 |-- R + R*R*(A1 + R*(A2 + R*(A3 + R*(A4 + R*A5))))
515 |--[R+R*S*(A2+S*A4)] + [S*(A1+S*(A3+S*A5))]
520 fmoves #0x3AB60B70,%fp2 | ...fp2 IS A5
523 fmulx %fp1,%fp2 | ...fp2 IS S*A5
[all...]
H A Dssin.S235 |--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
257 faddd SINA5,%fp3 | ...A5+TA7
260 fmulx %fp1,%fp3 | ...T(A5+TA7)
263 faddd SINA3,%fp3 | ...A3+T(A5+TA7)
266 fmulx %fp3,%fp1 | ...T(A3+T(A5+TA7))
269 faddx SINA1,%fp1 | ...A1+T(A3+T(A5+TA7))
272 faddx %fp2,%fp1 | ...[A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]
609 faddd SINA5,%fp1 | ...A5+S(A6+SA7)
614 fmulx %fp0,%fp1 | ...S(A5+S(A6+SA7))
618 faddd SINA4,%fp1 | ...A4+S(A5
[all...]
H A Dbinstr.S35 | A5. Add using the carry the 64-bit quantities in d2:d3 and d4:d5
102 | A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
H A Dstwotox.S62 | P = r + r*r*(A1+r*(A2+...+r*A5)).
390 fmoved EXPA5,%fp2 | ...FP2 IS A5
393 fmulx %fp1,%fp2 | ...FP2 IS S*A5
396 faddd EXPA3,%fp2 | ...FP2 IS A3+S*A5
399 fmulx %fp1,%fp2 | ...FP2 IS S*(A3+S*A5)
402 faddd EXPA1,%fp2 | ...FP2 IS A1+S*(A3+S*A5)
405 fmulx %fp1,%fp2 | ...FP2 IS S*(A1+S*(A3+S*A5))
H A Ddecbin.S56 | A5. Form the final binary number by scaling the mantissa by
H A Dbindec.S39 | A5. Set ICTR = 0;
269 | A5. Set ICTR = 0;
/linux-master/tools/perf/arch/riscv/util/
H A Dunwind-libdw.c37 dwarf_regs[15] = REG(A5);
/linux-master/arch/m68k/ifpsp060/src/
H A Dfplsp.S5078 #--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
5102 fadd.d SINA5(%pc),%fp3 # A5+TA7
5105 fmul.x %fp1,%fp3 # T(A5+TA7)
5108 fadd.d SINA3(%pc),%fp3 # A3+T(A5+TA7)
5111 fmul.x %fp3,%fp1 # T(A3+T(A5+TA7))
5114 fadd.x SINA1(%pc),%fp1 # A1+T(A3+T(A5+TA7))
5117 fadd.x %fp2,%fp1 # [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]
5312 fadd.d SINA5(%pc),%fp1 # A5+S(A6+SA7)
5315 fmul.x %fp0,%fp1 # S(A5+S(A6+SA7))
5319 fadd.d SINA4(%pc),%fp1 # A4+S(A5
[all...]
H A Dfpsp.S5184 #--R' + R'*S*( [A1+T(A3+T(A5+TA7))] + [S(A2+T(A4+TA6))])
5208 fadd.d SINA5(%pc),%fp3 # A5+TA7
5211 fmul.x %fp1,%fp3 # T(A5+TA7)
5214 fadd.d SINA3(%pc),%fp3 # A3+T(A5+TA7)
5217 fmul.x %fp3,%fp1 # T(A3+T(A5+TA7))
5220 fadd.x SINA1(%pc),%fp1 # A1+T(A3+T(A5+TA7))
5223 fadd.x %fp2,%fp1 # [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6))]
5418 fadd.d SINA5(%pc),%fp1 # A5+S(A6+SA7)
5421 fmul.x %fp0,%fp1 # S(A5+S(A6+SA7))
5425 fadd.d SINA4(%pc),%fp1 # A4+S(A5
[all...]
/linux-master/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c1161 #define A5 155 macro
1162 SIG_EXPR_LIST_DECL_SINGLE(A5, GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
1163 SIG_EXPR_LIST_DECL_SINGLE(A5, RMII1TXD1, RMII1, RMII1_DESC);
1164 SIG_EXPR_LIST_DECL_SINGLE(A5, RGMII1TXD1, RGMII1);
1165 PIN_DECL_(A5, SIG_EXPR_LIST_PTR(A5, GPIOT3), SIG_EXPR_LIST_PTR(A5, RMII1TXD1),
1166 SIG_EXPR_LIST_PTR(A5, RGMII1TXD1));
1267 FUNC_GROUP_DECL(RGMII1, B4, A4, A3, D6, C5, C4, B5, E9, F9, A5, E7, D7);
1268 FUNC_GROUP_DECL(RMII1, B4, A3, D6, C5, C4, B5, E9, F9, A5);
[all...]
H A Dpinctrl-aspeed-g4.c1157 #define A5 143 macro
1158 SIG_EXPR_LIST_DECL_SINGLE(A5, MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31));
1159 PIN_DECL_1(A5, GPIOR7, MDIO1);
1161 FUNC_GROUP_DECL(MDIO1, C6, A5);
1923 ASPEED_PINCTRL_PIN(A5),
2470 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, V20, A5, SCU8C, 31),
2471 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, V20, A5, SCU8C, 31),
/linux-master/drivers/pinctrl/renesas/
H A Dpfc-r8a77970.c169 #define IP0_23_20 FM(DU_DR7) FM(MSIOF3_TXD) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
415 PINMUX_IPSR_GPSR(IP0_23_20, A5),
H A Dpfc-r8a77990.c105 #define GPSR1_5 F_(A5, IP3_19_16)
242 #define IP3_19_16 FM(A5) FM(SCK4_A) FM(MSIOF3_SCK_B) FM(VI4_DATA9) FM(PWM3_B) F_(0, 0) FM(RIF2_SYNC_B) F_(0, 0) FM(QPOLA) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
701 PINMUX_IPSR_GPSR(IP3_19_16, A5),
5134 [22] = RCAR_GP_PIN(1, 5), /* A5 */
H A Dpfc-sh7734.c615 PINMUX_IPSR_GPSR(IP0_11_10, A5),
1374 GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A),
H A Dpfc-r8a77980.c203 #define IP0_23_20 FM(DU_DR7) F_(0, 0) FM(GETHER_RMII_TXD0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
488 PINMUX_IPSR_GPSR(IP0_23_20, A5),
H A Dpfc-r8a77951.c122 #define GPSR1_5 F_(A5, IP2_19_16)
276 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
771 PINMUX_IPSR_GPSR(IP2_19_16, A5),
5679 { RCAR_GP_PIN(1, 5), 24, 3 }, /* A5 */
5946 [17] = RCAR_GP_PIN(1, 5), /* A5 */
H A Dpfc-r8a77965.c127 #define GPSR1_5 F_(A5, IP2_19_16)
279 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
777 PINMUX_IPSR_GPSR(IP2_19_16, A5),
5875 { RCAR_GP_PIN(1, 5), 24, 3 }, /* A5 */
6139 [17] = RCAR_GP_PIN(1, 5), /* A5 */
H A Dpfc-r8a7796.c127 #define GPSR1_5 F_(A5, IP2_19_16)
279 #define IP2_19_16 FM(A5) FM(LCDOUT21) FM(MSIOF3_SS2_B) FM(SCK4_B) FM(VI4_DATA13) FM(VI5_DATA13) FM(DU_DB5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
775 PINMUX_IPSR_GPSR(IP2_19_16, A5),
5634 { RCAR_GP_PIN(1, 5), 24, 3 }, /* A5 */
5898 [17] = RCAR_GP_PIN(1, 5), /* A5 */
H A Dpfc-r8a73a4.c337 F1(A5), F2(MMCD1_2), IRQ(36),
H A Dpfc-sh7264.c1281 GPIO_FN(A5),
H A Dpfc-r8a7792.c378 PINMUX_SINGLE(A5),
2722 [21] = RCAR_GP_PIN(2, 21), /* A5 */
H A Dpfc-r8a779a0.c362 #define IP0SR1_23_20 FM(HTX0) FM(TX0) F_(0, 0) F_(0, 0) F_(0, 0) FM(A5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
812 PINMUX_IPSR_GPSR(IP0SR1_23_20, A5),
H A Dpfc-r8a77470.c699 PINMUX_IPSR_GPSR(IP4_27_24, A5),

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