Searched refs:training_result (Results 1 - 10 of 10) sorted by relevance
/u-boot/drivers/ddr/marvell/a38x/ |
H A D | ddr3_debug.c | 208 return training_result[stage]; 412 (training_result[INIT_CONTROLLER] 419 (training_result[SET_LOW_FREQ] 426 (training_result[LOAD_PATTERN] 433 (training_result[SET_MEDIUM_FREQ] 440 (training_result[WRITE_LEVELING] 447 (training_result[LOAD_PATTERN_2] 454 (training_result[READ_LEVELING] 461 (training_result[WRITE_LEVELING_SUPP] 468 (training_result[PBS_R [all...] |
H A D | mv_ddr4_training_leveling.c | 386 training_result[training_stage][if_id] = TEST_FAILED; 391 if ((training_result[training_stage][if_id] == NO_TEST_DONE) || 392 (training_result[training_stage][if_id] == TEST_SUCCESS)) 393 training_result[training_stage][if_id] = TEST_SUCCESS; 436 if (training_result[training_stage][0] == TEST_SUCCESS)
|
H A D | ddr3_training_leveling.c | 61 training_result[training_stage][if_id] = TEST_SUCCESS; 231 training_result[training_stage][if_id] = 305 if (training_result[training_stage][if_id] == TEST_FAILED) 435 training_result[training_stage][if_id] = TEST_SUCCESS; 712 training_result[training_stage][if_id] = TEST_FAILED; 757 if (training_result[training_stage][if_id] == TEST_FAILED) 826 training_result[training_stage][if_id] = TEST_SUCCESS; 1108 training_result[training_stage][if_id] = 1162 if (training_result[training_stage][if_id] == TEST_FAILED) 1267 training_result[training_stag [all...] |
H A D | ddr3_training_centralization.c | 59 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; local 135 PARAM_NOT_CARE, training_result); 528 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; local 575 PARAM_NOT_CARE, training_result);
|
H A D | ddr3_init.h | 88 extern enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM];
|
H A D | ddr3_training_bist.c | 227 enum hws_training_ip_stat training_result; local 234 TIP_ITERATION_NUM, pattern, EDGE_FP, CS_SINGLE, cs, &training_result);
|
H A D | ddr3_training_pbs.c | 718 training_result[training_stage][if_id] 725 training_result[ 727 (training_result[training_stage]
|
H A D | mv_ddr4_training_calibration.c | 341 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; local 416 EDGE_FPF, CS_SINGLE, PARAM_NOT_CARE, training_result); 1088 enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM]; local 1183 pattern, EDGE_FPF, CS_SINGLE, PARAM_NOT_CARE, training_result); 1325 pattern, EDGE_FPF, CS_SINGLE, PARAM_NOT_CARE, training_result); 2029 enum hws_training_ip_stat training_result; local 2095 EDGE_FPF, CS_SINGLE, PARAM_NOT_CARE, &training_result);
|
H A D | ddr3_training.c | 43 enum hws_result training_result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]; variable in typeref:enum:hws_result 1087 training_result[training_stage][interface_num] = 1239 enum hws_result *flow_result = training_result[training_stage]; 1270 training_result[training_stage][if_id] = TEST_SUCCESS; 2612 training_result[stage][if_id] = NO_TEST_DONE; 2638 if (training_result[stage][if_id] == TEST_FAILED)
|
H A D | ddr3_training_ip_engine.c | 999 training_result[training_stage][if_id] = TEST_SUCCESS;
|
Completed in 160 milliseconds