Searched refs:tier (Results 1 - 6 of 6) sorted by relevance

/u-boot/drivers/thermal/
H A Dimx_tmu.c55 u32 tier; /* Interrupt Enable Register */ member in struct:imx_tmu_regs
87 u32 tier; /* Interrupt Enable Register */ member in struct:imx_tmu_regs_v4
123 u32 tier; /* Interrupt enable register */ member in struct:imx_tmu_regs_v2
139 u32 tier; /* Interrupt enable register */ member in struct:imx_tmu_regs_v3
433 writel(0x0, &pdata->regs->regs_v3.tier);
440 writel(0x0, &pdata->regs->regs_v2.tier);
446 writel(TIER_DISABLE, &pdata->regs->regs_v4.tier);
455 writel(TIER_DISABLE, &pdata->regs->regs_v1.tier);
/u-boot/arch/arm/include/asm/arch-omap4/
H A Dcpu.h24 u32 tier; /* 0x1c rw */ member in struct:gptimer
/u-boot/drivers/timer/
H A Domap-timer.c28 unsigned int tier; /* offset 0x20 */ member in struct:omap_gptimer_regs
/u-boot/arch/arm/include/asm/arch-omap5/
H A Dcpu.h29 u32 tier; /* 0x2c rw */ member in struct:gptimer
/u-boot/arch/arm/include/asm/arch-am33xx/
H A Dcpu.h427 unsigned int tier; /* offset 0x20 */ member in struct:gptimer
/u-boot/arch/arm/include/asm/arch-omap3/
H A Dcpu.h272 u32 tier; /* 0x1c rw */ member in struct:gptimer

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