Searched refs:sdiv (Results 1 - 9 of 9) sorted by relevance
| /u-boot/drivers/clk/exynos/ |
| H A D | clk-pll.c | 46 u32 mdiv, pdiv, sdiv, pll_con3; local
52 sdiv = (pll_con3 >> PLL0822X_SDIV_SHIFT) & PLL0822X_SDIV_MASK;
55 do_div(fvco, (pdiv << sdiv));
79 u32 mdiv, pdiv, sdiv, pll_con3, pll_con5; local
87 sdiv = (pll_con3 >> PLL0831X_SDIV_SHIFT) & PLL0831X_SDIV_MASK;
91 do_div(fvco, (pdiv << sdiv));
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| H A D | clk-exynos7420.c | 78 unsigned long mdiv, sdiv, pdiv; local
83 sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK;
86 do_div(fvco, (pdiv << sdiv));
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| /u-boot/drivers/clk/imx/ |
| H A D | clk-pll14xx.c | 61 .sdiv = (_s), \
69 .sdiv = (_s), \
134 u32 mdiv, pdiv, sdiv, pll_div; local
139 sdiv = (pll_div & SDIV_MASK) >> SDIV_SHIFT;
142 do_div(fvco, pdiv << sdiv);
151 u32 mdiv, pdiv, sdiv, pll_div_ctl0, pll_div_ctl1; local
158 sdiv = (pll_div_ctl0 & SDIV_MASK) >> SDIV_SHIFT;
165 do_div(fvco, pdiv << sdiv);
233 tmp |= rate->sdiv << SDIV_SHIFT;
254 (rate->sdiv << SDIV_SHIF
[all...] |
| H A D | clk.h | 34 unsigned int sdiv; member in struct:imx_pll14xx_rate_table
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| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| H A D | clock_imx8mm.h | 20 .sdiv = (_s), \
42 int sdiv; member in struct:imx_int_pll_rate_table
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| /u-boot/board/samsung/trats/ |
| H A D | setup.h | 229 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\
232 | (sdiv << 0))
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| /u-boot/arch/arm/mach-exynos/ |
| H A D | exynos4_setup.h | 326 #define SET_PLL(mdiv, pdiv, sdiv) ((ENABLE << 31)\
329 | (sdiv << 0))
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| H A D | exynos5_setup.h | 21 #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv)
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| /u-boot/arch/arm/mach-imx/imx8m/ |
| H A D | clock_imx8mm.c | 113 (rate->sdiv << SDIV_SHIFT);
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