/u-boot/arch/arm/cpu/armv7/bcmcygnus/ |
H A D | Makefile | 5 obj-y += reset.o
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/u-boot/arch/arm/cpu/armv7/bcmnsp/ |
H A D | Makefile | 5 obj-y += reset.o
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/u-boot/arch/arm/include/asm/arch-imx8/ |
H A D | boot0.h | 17 ldr x0, =reset 20 b reset
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/u-boot/arch/arm/mach-hpe/gxp/ |
H A D | Makefile | 1 obj-y += reset.o
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/u-boot/drivers/reset/ |
H A D | Makefile | 6 obj-$(CONFIG_DM_RESET) += reset-uclass.o 7 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o 8 obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o 9 obj-$(CONFIG_STI_RESET) += sti-reset.o 10 obj-$(CONFIG_STM32_RESET) += stm32-reset.o 11 obj-$(CONFIG_TEGRA_CAR_RESET) += tegra-car-reset.o 12 obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o 13 obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o 14 obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o 15 obj-$(CONFIG_RESET_BCM6345) += reset [all...] |
H A D | reset-at91.c | 14 #include <reset-uclass.h> 16 #include <dt-bindings/reset/sama7g5-reset.h> 35 static int at91_rst_update(struct at91_reset *reset, unsigned long id, argument 40 if (!reset->dev_base) 43 val = readl(reset->dev_base); 48 writel(val, reset->dev_base); 56 struct at91_reset *reset = dev_get_priv(reset_ctl->dev); local 58 if (!reset->data->n_device_reset || 59 args->args[0] < reset 70 struct at91_reset *reset = dev_get_priv(reset_ctl->dev); local 77 struct at91_reset *reset = dev_get_priv(reset_ctl->dev); local 90 struct at91_reset *reset = dev_get_priv(dev); local [all...] |
H A D | reset-sunxi.c | 12 #include <reset-uclass.h> 39 const struct ccu_reset *reset = plat_to_reset(plat, reset_ctl->id); local 42 if (!(reset->flags & CCU_RST_F_IS_VALID)) { 48 reset_ctl->id, reset->off, ilog2(reset->bit)); 50 reg = readl(plat->base + reset->off); 52 reg |= reset->bit; 54 reg &= ~reset->bit; 56 writel(reg, plat->base + reset->off);
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H A D | reset-raspberrypi.c | 3 * Raspberry Pi 4 firmware reset driver 9 #include <reset-uclass.h> 11 #include <dt-bindings/reset/raspberrypi,firmware-reset.h> 38 { .compatible = "raspberrypi,firmware-reset" }, 43 .name = "raspberrypi-reset",
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/u-boot/arch/arm/cpu/armv7m/ |
H A D | start.S | 9 .globl reset 10 .type reset, %function 11 reset: label
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/u-boot/arch/arm/mach-npcm/npcm8xx/ |
H A D | Makefile | 1 obj-y += cpu.o reset.o
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/u-boot/drivers/net/octeontx/ |
H A D | xcv.c | 27 union xcvx_reset reset; local 30 /* Take the DLL out of reset */ 31 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); 32 reset.s.dllrst = 0; 33 writeq(reset.u, XCVX_BASE + XCVX_RESET(0)); 35 /* Take the clock tree out of reset */ 36 reset.u = readq(XCVX_BASE + XCVX_RESET(0)); 37 reset.s.clkrst = 0; 38 writeq(reset.u, XCVX_BASE + XCVX_RESET(0)); 51 reset 80 union xcvx_reset reset; local [all...] |
/u-boot/arch/mips/mach-pic32/ |
H A D | Makefile | 7 obj-y = cpu.o lowlevel_init.o reset.
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/u-boot/arch/arm/mach-omap2/omap3/ |
H A D | emac.c | 20 u32 reset; local 22 /* ensure that the module is out of reset */ 23 reset = readl(&am35x_scm_general_regs->ip_sw_reset); 24 reset &= ~CPGMACSS_SW_RST; 25 writel(reset, &am35x_scm_general_regs->ip_sw_reset);
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/u-boot/arch/arm/mach-versatile/ |
H A D | Makefile | 7 obj-y += reset.o
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/u-boot/arch/arm/mach-socfpga/include/mach/ |
H A D | boot0.h | 20 b reset; /* SoCFPGA Gen5 jumps here */ variable 21 b reset; /* SoCFPGA Gen10 trampoline */ variable
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/u-boot/arch/arm/mach-snapdragon/include/mach/ |
H A D | boot0.h | 35 bne reset 48 b reset 53 .quad reset /* el1_elr */
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/u-boot/arch/mips/mach-jz47xx/jz4780/ |
H A D | Makefile | 3 obj-y := gpio.o jz4780.o pll.o reset.o sdram.o timer.o
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/u-boot/arch/arm/mach-bcm283x/ |
H A D | Makefile | 6 obj-y += init.o reset.o mbox.o msg.o phys2bus.o
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/u-boot/arch/arm/mach-s5pc1xx/ |
H A D | Makefile | 10 obj-y += reset.o
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/u-boot/drivers/mmc/ |
H A D | mmc-pwrseq.c | 23 struct gpio_desc reset; local 26 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT); 29 dm_gpio_set_value(&reset, 1); 31 dm_gpio_set_value(&reset, 0);
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/u-boot/board/compulab/common/ |
H A D | common.h | 28 int (*reset)(int), int rst_gpio); 31 int (*reset)(int), int rst_gpio) 30 cl_omap3_smc911x_init(int id, int cs, u32 base_addr, int (*reset)(int), int rst_gpio) argument
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
H A D | boot0.h | 33 beq reset /* regular bootup */ 44 b reset
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/u-boot/arch/arm/include/asm/ |
H A D | boot0-linux-kernel-header.h | 37 b reset /* branch to kernel start, magic */
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/u-boot/test/dm/ |
H A D | syscon-reset.c | 10 #include <reset.h> 30 struct udevice *reset; local 35 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "syscon-reset-test", 36 &reset)); 39 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "syscon-reset", 43 ut_asserteq(-EINVAL, reset_get_by_name(reset, "no_mask", &rst)); 44 ut_asserteq(-EINVAL, reset_get_by_name(reset, "out_of_range", &rst)); 45 ut_assertok(reset_get_by_name(reset, "valid", &rst));
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/u-boot/drivers/usb/host/ |
H A D | xhci-pci.c | 14 #include <reset.h> 19 struct reset_ctl reset; member in struct:xhci_pci_plat 60 ret = reset_get_by_index(dev, 0, &plat->reset); 62 dev_err(dev, "failed to get reset\n"); 66 if (reset_valid(&plat->reset)) { 67 ret = reset_assert(&plat->reset); 71 ret = reset_deassert(&plat->reset); 87 if (reset_valid(&plat->reset)) 88 reset_free(&plat->reset); 98 if (reset_valid(&plat->reset)) [all...] |