Searched refs:reg_offs (Results 1 - 4 of 4) sorted by relevance
/u-boot/drivers/gpio/ |
H A D | mt7621_gpio.c | 47 static u32 reg_offs(struct mediatek_gpio_plat *plat, int reg) function 57 reg_offs(plat, GPIO_REG_DATA)) & BIT(offset)); 66 reg_offs(plat, value ? GPIO_REG_DSET : GPIO_REG_DCLR)); 75 clrbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL), 86 setbits_le32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL), 98 t = ioread32(mediatek_gpio_membase + reg_offs(plat, GPIO_REG_CTRL));
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H A D | octeon_gpio.c | 49 u32 reg_offs; member in struct:octeon_gpio_data 100 writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + 113 u64 reg = readq(gpio->base + gpio->data->reg_offs + 128 writeq(GPIO_BIT(offset), gpio->base + gpio->data->reg_offs + 189 priv->data->reg_offs + GPIO_CONST) & 216 .reg_offs = 0x80, 222 .reg_offs = 0x00,
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/u-boot/drivers/i2c/ |
H A D | octeon_i2c.c | 165 * @reg_offs: Register offset 171 u32 reg_offs; member in struct:octeon_i2c_data 753 .reg_offs = 0x0000, 760 .reg_offs = 0x1000, 767 .reg_offs = 0x1000, 800 twsi->base += twsi->data->reg_offs;
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/u-boot/drivers/mtd/nand/raw/brcmnand/ |
H A D | brcmnand.c | 1252 u16 offset0, offset10, reg_offs; local 1261 reg_offs = offset10 + ((offs - 0x10) & ~0x03); 1263 reg_offs = offset0 + (offs & ~0x03); 1265 return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3)); 1271 u16 offset0, offset10, reg_offs; local 1280 reg_offs = offset10 + ((offs - 0x10) & ~0x03); 1282 reg_offs = offset0 + (offs & ~0x03); 1284 nand_writereg(ctrl, reg_offs, data);
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