Searched refs:reg_bits (Results 1 - 5 of 5) sorted by relevance

/u-boot/board/ti/dra7xx/
H A Devm.c383 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
394 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
405 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
412 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
422 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
431 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
442 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
453 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
460 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
470 .iva.efuse.reg_bits
[all...]
/u-boot/board/ti/am57xx/
H A Dboard.c350 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
361 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
372 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
379 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
389 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
398 .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
409 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
420 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
427 .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
437 .iva.efuse.reg_bits
[all...]
/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c370 .mpu.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
373 .core.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
376 .mm.efuse.reg_bits = OMAP5_ES2_PROD_REGBITS,
/u-boot/arch/arm/mach-omap2/
H A Dclocks-common.c499 switch (v->efuse.reg_bits) {
508 v->efuse.reg[opp], v->efuse.reg_bits);
514 v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp]);
519 __func__, v->efuse.reg[opp], v->efuse.reg_bits, v->value[opp],
/u-boot/arch/arm/include/asm/
H A Domap_common.h562 * @reg_bits: Number of bits in a register address, mandatory.
566 u8 reg_bits; member in struct:volts_efuse_data

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