/u-boot/arch/mips/mach-octeon/include/mach/ |
H A D | cvmx-helper-jtag.h | 46 * @param qlm QLM to shift value into 54 u32 cvmx_helper_qlm_jtag_shift(int qlm, int bits, u32 data); 63 * @param qlm QLM to shift zeros into 66 void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits); 73 * @param qlm QLM to program 75 void cvmx_helper_qlm_jtag_update(int qlm); 80 * @param qlm QLM to program 82 void cvmx_helper_qlm_jtag_capture(int qlm);
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H A D | cvmx-helper-errata.h | 47 * @param qlm QLM to disable 2nd order CDR for. 49 void __cvmx_helper_errata_qlm_disable_2nd_order_cdr(int qlm);
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H A D | octeon_qlm.h | 16 * Configure qlm/dlm speed and mode. 17 * @param qlm The QLM or DLM to configure 22 * @param pcie_mode Only used when qlm/dlm are in pcie mode. 45 int octeon_configure_qlm(int qlm, int speed, int mode, int rc, int pcie_mode, int ref_clk_sel, 48 int octeon_configure_qlm_cn78xx(int node, int qlm, int speed, int mode, int rc, int pcie_mode, 55 * @param qlm QLM to configure 65 void octeon_qlm_tune_per_lane_v3(int node, int qlm, int baud_mhz, int lane, int tx_swing, 72 * @param qlm QLM to configure 81 void octeon_qlm_tune_v3(int node, int qlm, int baud_mhz, int tx_swing, int tx_premptap, int tx_gain, 89 * @param qlm QL [all...] |
H A D | cvmx-qlm.h | 10 * Interface 0 on the 78xx can be connected to qlm 0 or qlm 2. When interface 11 * 0 is connected to qlm 0, this macro must be set to 0. When interface 0 is 12 * connected to qlm 2, this macro must be set to 1. 17 * Interface 1 on the 78xx can be connected to qlm 1 or qlm 3. When interface 18 * 1 is connected to qlm 1, this macro must be set to 0. When interface 1 is 19 * connected to qlm 3, this macro must be set to 1. 40 * Return the qlm number based on the interface 47 * Return the qlm numbe [all...] |
/u-boot/board/Marvell/octeon_ebb7304/ |
H A D | board.c | 12 #include <mach/cvmx-qlm.h> 304 int qlm; local 307 for (qlm = 0; qlm < 7; qlm++) { 312 mode = cvmx_qlm_get_mode(qlm); 321 speed = (cvmx_qlm_get_gbaud_mhz(qlm) * 8 / 10) * 4; 366 if (qlm == 5) { 410 sprintf(fdt_key, "%d,%s", qlm, type_str); 411 debug("Patching qlm 455 int qlm; local [all...] |
/u-boot/arch/mips/mach-octeon/ |
H A D | cvmx-qlm.c | 5 * Helper utilities for qlm. 17 #include <mach/cvmx-qlm.h> 42 * Their is a copy of this in bootloader qlm configuration, make sure 91 * Return the qlm number based on the interface 95 * Return: the qlm number based on the xiface 128 * Return the qlm number based for a port in the interface 133 * Return: the qlm number based on the xiface 143 int qlm; local 151 qlm = xi.interface + 2; /* QLM 2 or 3 */ 153 qlm 168 int qlm; local 185 int qlm; local 235 int qlm; local 327 cvmx_qlm_get_lanes(int qlm) argument 422 cvmx_qlm_jtag_get(int qlm, int lane, const char *name) argument 453 cvmx_qlm_jtag_set(int qlm, int lane, const char *name, uint64_t value) argument 523 int qlm; local 595 int qlm; local 611 __cvmx_qlm_pcie_cfg_rxd_set_tweak(int qlm, int lane) argument 625 cvmx_qlm_get_gbaud_mhz_node(int node, int qlm) argument 728 cvmx_qlm_get_gbaud_mhz(int qlm) argument 908 __cvmx_qlm_get_mode_cn70xx(int qlm) argument 1109 __cvmx_qlm_get_mode_cn6xxx(int qlm) argument 1256 __cvmx_qlm_set_mult(int qlm, int baud_mhz, int old_multiplier) argument 1303 cvmx_qlm_get_mode_cn78xx(int node, int qlm) argument 1437 __cvmx_qlm_get_mode_cn73xx(int qlm) argument 1692 __cvmx_qlm_get_mode_cnf75xx(int qlm) argument 1798 cvmx_qlm_get_mode(int qlm) argument 1814 cvmx_qlm_measure_clock_cn7xxx(int node, int qlm) argument 1880 cvmx_qlm_measure_clock_node(int node, int qlm) argument 1895 cvmx_qlm_measure_clock(int qlm) argument 1977 __cvmx_qlm_rx_equalization(int node, int qlm, int lane) argument 2247 cvmx_qlm_gser_errata_27882(int node, int qlm, int lane) argument 2289 cvmx_qlm_gser_errata_25992(int node, int qlm) argument 2312 cvmx_qlm_display_registers(int qlm) argument [all...] |
H A D | octeon_qlm.c | 13 #include <mach/cvmx-qlm.h> 60 int cvmx_qlm_is_ref_clock(int qlm, int reference_mhz) argument 62 int ref_clock = cvmx_qlm_measure_clock(qlm); 69 static int __get_qlm_spd(int qlm, int speed) argument 73 if (cvmx_qlm_is_ref_clock(qlm, 100)) { 82 } else if (cvmx_qlm_is_ref_clock(qlm, 125)) { 95 } else if (cvmx_qlm_is_ref_clock(qlm, 156)) { 110 } else if (cvmx_qlm_is_ref_clock(qlm, 161)) { 159 * Configure qlm speed and mode. MIO_QLMX_CFG[speed,mode] are not set 162 * @param qlm Th 181 octeon_configure_qlm_cn61xx(int qlm, int speed, int mode, int rc, int pcie2x1) argument 333 __dlm_setup_pll_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input, int is_sff7000_rxaui) argument 825 __sata_dlm_init_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input) argument 1009 __sata_dlm_init_cn73xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input) argument 1517 __sata_bist_cn70xx(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input) argument 1588 __setup_sata(int qlm, int baud_mhz, int ref_clk_sel, int ref_clk_input) argument 1594 __dlmx_setup_pcie_cn70xx(int qlm, enum cvmx_qlm_mode mode, int gen2, int rc, int ref_clk_sel, int ref_clk_input) argument 1887 octeon_configure_qlm_cn70xx(int qlm, int speed, int mode, int rc, int gen2, int ref_clk_sel, int ref_clk_input) argument 2053 octeon_qlm_dfe_disable(int node, int qlm, int lane, int baud_mhz, int mode) argument 2174 octeon_qlm_dfe_disable_ctle_agc(int node, int qlm, int lane, int baud_mhz, int mode, int ctle_zero, int agc_pre_ctle, int agc_post_ctle) argument 2295 octeon_qlm_tune_per_lane_v3(int node, int qlm, int baud_mhz, int lane, int tx_swing, int tx_pre, int tx_post, int tx_gain, int tx_vboost) argument 2474 octeon_qlm_tune_v3(int node, int qlm, int baud_mhz, int tx_swing, int tx_premptap, int tx_gain, int tx_vboost) argument 2496 octeon_qlm_set_channel_v3(int node, int qlm, int pre_ctle) argument 2505 __qlm_init_errata_20844(int node, int qlm) argument 3285 __set_qlm_ref_clk_cn78xx(int node, int qlm, int lane_mode, int ref_clk_sel) argument 3307 __qlm_kr_inc_dec_gser26636(int node, int qlm) argument 3327 __qlm_rx_eq_temp_gser27140(int node, int qlm) argument 3397 __qlm_errata_gser_26150(int node, int qlm, int is_pcie) argument 3569 __qlm_setup_pll_cn78xx(int node, int qlm) argument 3752 int qlm, lane; local 3835 __cvmx_qlm_pcie_errata_cn78xx(int node, int qlm) argument 4108 octeon_configure_qlm_cn78xx(int node, int qlm, int baud_mhz, int mode, int rc, int gen3, int ref_clk_sel, int ref_clk_input) argument 4602 __is_qlm_valid_bgx_cn73xx(int qlm) argument 4634 octeon_configure_qlm_cn73xx(int qlm, int baud_mhz, int mode, int rc, int gen3, int ref_clk_sel, int ref_clk_input) argument 5258 __rmac_pll_config(int baud_mhz, int qlm, int mode) argument 5344 octeon_configure_qlm_cnf75xx(int qlm, int baud_mhz, int mode, int rc, int gen3, int ref_clk_sel, int ref_clk_input) argument 5793 octeon_configure_qlm(int qlm, int speed, int mode, int rc, int pcie_mode, int ref_clk_sel, int ref_clk_input) argument 5820 int qlm; local [all...] |
H A D | cvmx-helper-jtag.c | 16 #include <mach/cvmx-qlm.h> 69 * @param qlm QLM to shift value into 77 uint32_t cvmx_helper_qlm_jtag_shift(int qlm, int bits, uint32_t data) argument 83 jtgc.s.mux_sel = qlm; 91 jtgd.s.select = 1 << qlm; 106 * @param qlm QLM to shift zeros into 109 void cvmx_helper_qlm_jtag_shift_zeros(int qlm, int bits) argument 116 cvmx_helper_qlm_jtag_shift(qlm, n, 0); 126 * @param qlm QLM to program 128 void cvmx_helper_qlm_jtag_update(int qlm) argument 154 cvmx_helper_qlm_jtag_capture(int qlm) argument [all...] |
H A D | cvmx-qlm-tables.c | 10 #include <mach/cvmx-qlm.h>
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H A D | cvmx-helper-xaui.c | 19 #include <mach/cvmx-qlm.h> 118 int qlm = cvmx_qlm_interface(xiface); local 119 enum cvmx_qlm_mode mode = cvmx_qlm_get_mode(qlm); 226 int qlm = interface; local 229 __func__, __LINE__, qlm); 230 cvmx_qlm_display_registers(qlm); 237 if ((cvmx_qlm_get_gbaud_mhz(qlm) == 6250) && 238 (cvmx_qlm_jtag_get(qlm, 0, "clkf_byp") != 20)) { 241 cvmx_qlm_jtag_set(qlm, -1, "clkf_byp", 20); 243 cvmx_qlm_jtag_set(qlm, 422 int qlm = (interface == 1) ? 0 : interface; local 429 int qlm = cvmx_qlm_interface(interface); local [all...] |
H A D | cvmx-pcie.c | 16 #include <mach/cvmx-qlm.h> 25 #include <mach/cvmx-qlm.h> 507 int qlm = __cvmx_pcie_get_qlm(node, pcie_port); local 508 int speed = cvmx_qlm_get_gbaud_mhz(qlm); 561 if (qlm >= 5) 662 * De-assert GSER_PHY.phy_reset for a given qlm 665 * @param qlm qlm for a given PCIe port 667 static void __cvmx_pcie_gser_phy_config(int node, int pcie_port, int qlm) argument 674 ctrl.u64 = CVMX_READ_CSR(CVMX_GSERX_PHY_CTL(qlm)); 1022 __cvmx_pcie_check_qlm_mode(int node, int pcie_port, int qlm) argument 1200 int qlm = 0; local 1296 int qlm = __cvmx_pcie_get_qlm(0, pcie_port); local 1761 int qlm; local [all...] |
H A D | cvmx-ilk.c | 18 #include <mach/cvmx-qlm.h> 165 * is fused to give this qlm to ilk 173 debug("ILK%d: %s: qlm unavailable\n", interface, 182 int qlm; local 188 for (qlm = 4; qlm < 8; qlm++) { 194 csr_rd_node(node, CVMX_GSERX_PHY_CTL(qlm)); 199 gserx_cfg.u64 = csr_rd_node(node, CVMX_GSERX_CFG(qlm)); 202 << (4 * (qlm 237 int qlm = (interface) ? 2 : 1; local [all...] |
H A D | cvmx-fau-compat.c | 16 #include <mach/cvmx-qlm.h>
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H A D | Makefile | 54 obj-y += cvmx-qlm.o 55 obj-y += cvmx-qlm-tables.o
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H A D | cvmx-helper.c | 17 #include <mach/cvmx-qlm.h> 611 int qlm = cvmx_qlm_lmac(xiface, 0); local 614 if (qlm == -1) { 618 qlm_mode = cvmx_qlm_get_mode_cn78xx(xi.node, qlm); 728 int qlm = 0; local 730 for (qlm = 0; qlm < 5; qlm++) { 732 if (csr_rd_node(xi.node, CVMX_GSERX_CFG(qlm)) & 0x1) { 759 int qlm local 837 int qlm = cvmx_qlm_lmac(xiface, 0); local [all...] |
H A D | octeon_fdt.c | 23 #include <mach/cvmx-qlm.h> 92 * 'cavium,qlm-trim' 105 * looks for the property "cavium,qlm-trim". 107 * Also, when the trim_name is "cavium,qlm-trim" or NULL that the interfaces 118 bool rename = !trim_name || !strcmp(trim_name, "cavium,qlm-trim"); 132 * 'cavium,qlm-trim' 148 * looks for the property "cavium,qlm-trim". 150 * Also, when the trim_name is "cavium,qlm-trim" or NULL that the interfaces 174 char qlm[32]; local 181 trim_name = "cavium,qlm [all...] |
H A D | cvmx-helper-sgmii.c | 19 #include <mach/cvmx-qlm.h> 477 int qlm = cvmx_qlm_interface(xiface); local 479 if (cvmx_qlm_get_mode(qlm) != CVMX_QLM_MODE_SGMII) 623 int qlm; local 639 qlm = cvmx_qlm_interface(interface); 640 speed = cvmx_qlm_get_gbaud_mhz(qlm) * 8 / 10;
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H A D | cvmx-helper-fpa.c | 19 #include <mach/cvmx-qlm.h>
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H A D | cvmx-helper-ilk.c | 19 #include <mach/cvmx-qlm.h> 739 int qlm, lane_mask; local 741 for (qlm = 4; qlm < 8; qlm++) { 742 lane_mask = 1 << (qlm - 4) * 4; 746 node, qlm, -1)) 850 int qlm = cvmx_qlm_lmac(xiface, 0); local 852 result.s.speed = cvmx_qlm_get_gbaud_mhz(qlm) * 64 / 67;
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H A D | cvmx-helper-bgx.c | 17 #include <mach/cvmx-qlm.h> 820 int qlm = cvmx_qlm_lmac(xiface, index); local 824 speed = cvmx_qlm_get_gbaud_mhz_node(node, qlm); 826 speed = cvmx_qlm_get_gbaud_mhz(qlm); 838 int qlm = cvmx_qlm_lmac(xiface, index); local 842 speed = cvmx_qlm_get_gbaud_mhz_node(node, qlm); 844 speed = cvmx_qlm_get_gbaud_mhz(qlm); 1539 int qlm = cvmx_qlm_lmac(xiface, index); local 1667 cvmx_qlm_gser_errata_27882(node, qlm, index); 1699 if (__cvmx_qlm_rx_equalization(node, qlm, lan 2110 int qlm = cvmx_qlm_lmac(xiface, index); local [all...] |
H A D | cvmx-helper-npi.c | 19 #include <mach/cvmx-qlm.h>
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/u-boot/drivers/net/octeontx/ |
H A D | bgx.c | 51 int qlm; member in struct:lmac 265 int qlm = 0; local 269 qlm = (bgx_id) ? 2 : 0; 270 qlm += (index >= 2) ? 1 : 0; 274 qlm = 2; 277 qlm = 3; 281 qlm = 6; 283 qlm = 5; 286 qlm = 4; 291 cfg = readq(GSERX_CFG(qlm)) 565 get_qlm_lanes(int qlm) argument 575 __rx_equalization(int qlm, int lane) argument 691 int qlm; local 1457 int qlm[4] = {-1, -1, -1, -1}; local [all...] |
/u-boot/drivers/net/octeontx2/ |
H A D | cgx.h | 101 int cgx_intf_prbs(u8 qlm, u8 mode, u32 time, u8 lane); 102 int cgx_intf_display_eye(u8 qlm, u8 lane); 103 int cgx_intf_display_serdes(u8 qlm, u8 lane);
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H A D | cgx_intf.c | 269 int cgx_intf_prbs(u8 qlm, u8 mode, u32 time, u8 lane) argument 277 cmd.prbs_args.qlm = qlm; 681 int cgx_intf_display_eye(u8 qlm, u8 lane) argument 689 cmd.dsp_eye_args.qlm = qlm; 699 int cgx_intf_display_serdes(u8 qlm, u8 lane) argument 707 cmd.dsp_eye_args.qlm = qlm;
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H A D | cgx_intf.h | 414 u64 qlm:8; member in struct:cgx_prbs_args 422 u64 qlm:8; member in struct:cgx_display_eye_args
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