Searched refs:pll_num (Results 1 - 3 of 3) sorted by relevance
/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | fsl_corenet2_serdes.c | 207 u32 pll_num, pll_status, bc, dc, fc, pll_cr_upd, pll_cr0, pll_cr1; local 232 for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) { 233 pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0); 234 debug("A007186: pll_num=%x pllcr0=%x\n", 235 pll_num, pll_status); 268 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1); 271 out_be32(&srds_regs->bank[pll_num].pllcr1, 273 debug("A007186: pll_num [all...] |
/u-boot/arch/arm/mach-imx/mx6/ |
H A D | clock.c | 215 u32 div, test_div, pll_num, pll_denom; local 246 pll_num = __raw_readl(&imx_ccm->analog_pll_audio_num); 257 return infreq * (div + pll_num / pll_denom) / test_div; 265 pll_num = __raw_readl(&imx_ccm->analog_pll_video_num); 277 temp64 *= pll_num; 611 static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, argument 618 pll_div, pll_num, pll_denom); 649 writel(BF_ANADIG_PLL_VIDEO_NUM_A(pll_num), 686 u32 pll_div, pll_num, pll_denom, post_div = 1; local 759 pll_num [all...] |
/u-boot/arch/arm/mach-imx/mx7/ |
H A D | clock.c | 779 static int enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, argument 786 pll_div, pll_num, pll_denom); 832 writel(CCM_ANALOG_PLL_VIDEO_NUM_A(pll_num), 902 u32 pll_div, pll_num, pll_denom, post_div = 0; local 948 pll_num = (best - hck * pll_div) * pll_denom / hck; 950 if (enable_pll_video(pll_div, pll_num, pll_denom, post_div))
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