Searched refs:per (Results 1 - 14 of 14) sorted by relevance

/u-boot/drivers/pinctrl/meson/
H A Dpinctrl-meson.h113 #define BANK_DS(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib, \
120 [REG_PULLEN] = {per, peb}, \
129 #define BANK(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib) \
130 BANK_DS(n, f, l, per, peb, pr, pb, dr, db, or, ob, ir, ib, 0, 0)
/u-boot/arch/m68k/include/asm/coldfire/
H A Dpwm.h41 u8 per[4]; /* 0x14 Channel n Period */
46 u8 per[8]; /* 0x14 Channel n Period */
/u-boot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c165 .per = per_dpll_params_1536mhz,
179 .per = per_dpll_params_1536mhz,
193 .per = per_dpll_params_1536mhz,
207 .per = per_dpll_params_1536mhz,
221 .per = per_dpll_params_1536mhz,
/u-boot/arch/arm/mach-omap2/omap5/
H A Dhw_data.c221 .per = per_dpll_params_768mhz,
235 .per = per_dpll_params_768mhz_es2,
249 .per = per_dpll_params_768mhz_dra76x,
260 .per = per_dpll_params_768mhz_dra7xx,
271 .per = per_dpll_params_768mhz_dra7xx,
/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pio.h39 u32 per; /* 0x00 PIO Enable Register */ member in struct:at91_port
/u-boot/drivers/gpio/
H A Dat91_gpio.c56 writel(mask, &at91_port->per);
81 writel(mask, &at91_port->per);
234 writel(mask, &at91_port->per);
264 writel(mask, &at91_port->per);
/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dpsci.S175 lsl r6, r6, r1 @ 32 bytes per CPU
/u-boot/drivers/pinctrl/
H A Dpinctrl-at91.c116 /* return the shift value for a pin for "two bit" per pin registers,
356 writel(mask, &pio->per);
/u-boot/arch/arm/include/asm/
H A Domap_common.h531 const struct dpll_params *per; member in struct:dplls
/u-boot/arch/arm/mach-omap2/
H A Dclocks-common.c166 return &dpll_data->per[sysclk_ind];
408 params, DPLL_LOCK, "per");
/u-boot/scripts/
H A Dget_maintainer.pl1072 --multiline => print 1 entry per line
H A Dcheckpatch.pl92 --terse one line per report
116 --no-summary suppress the per-file summary
3303 "Possible unwrapped commit description (prefer a maximum 75 chars per line)\n" . $herecurr);
/u-boot/arch/mips/mach-octeon/include/mach/
H A Dcvmx-pcieepx-defs.h2550 u32 per : 1; member in struct:cvmx_pcieepx_cfg001::cvmx_pcieepx_cfg001_s
H A Dcvmx-pciercx-defs.h1907 u32 per : 1; member in struct:cvmx_pciercx_cfg001::cvmx_pciercx_cfg001_s

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