Searched refs:flow (Results 1 - 13 of 13) sorted by relevance
/u-boot/arch/arm/mach-tegra/tegra124/ |
H A D | psci.c | 10 #include <asm/arch/flow.h> 26 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 46 writel((2 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu1_csr); 47 writel((4 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu2_csr); 48 writel((8 << CSR_WAIT_WFI_SHIFT) | CSR_ENABLE, &flow->cpu3_csr); 50 writel(EVENT_MODE_STOP, &flow->halt_cpu1_events); 51 writel(EVENT_MODE_STOP, &flow->halt_cpu2_events); 52 writel(EVENT_MODE_STOP, &flow->halt_cpu3_events); 54 while (!(readl(&flow->cpu1_csr) & CSR_PWR_OFF_STS) || 55 !(readl(&flow [all...] |
H A D | cpu.c | 12 #include <asm/arch/flow.h> 115 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 123 clrbits_le32(&flow->ram_repair, RAM_REPAIR_BYPASS_EN); 127 setbits_le32(&flow->ram_repair, RAM_REPAIR_REQ); 132 val = readl(&flow->ram_repair); 138 setbits_le32(&flow->ram_repair_cluster1, RAM_REPAIR_REQ); 143 val = readl(&flow->ram_repair_cluster1); 156 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 165 clrbits_le32(&flow->cluster_control, 1);
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/u-boot/arch/arm/mach-tegra/tegra30/ |
H A D | cpu.c | 10 #include <asm/arch/flow.h> 40 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 45 clrbits_le32(flow->cluster_control, 1 << 0); 82 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 85 writel(run ? FLOW_MODE_NONE : FLOW_MODE_STOP, &flow->halt_cpu_events);
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/u-boot/tools/kermit/ |
H A D | send_cmd | 7 set flow-control none
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H A D | send_image | 9 set flow-control none
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H A D | flash_param | 11 #set flow-control none 12 set flow-control xon/xoff
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/u-boot/arch/arm/mach-tegra/tegra20/ |
H A D | warmboot_avp.c | 10 #include <asm/arch/flow.h> 27 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 80 writel(reg, &flow->halt_cop_events); 92 /* Halt CPU1 at the flow controller for uni-processor configurations */ 93 writel(EVENT_MODE_STOP, &flow->halt_cpu1_events); 195 writel(0, flow->halt_cpu_events); 217 writel(reg, flow->halt_cop_events);
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/u-boot/drivers/usb/eth/ |
H A D | lan75xx.c | 64 uint32_t flow = 0, fct_flow = 0; local 67 ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow); 74 return lan7x_write_reg(udev, FLOW, flow);
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H A D | lan7x.c | 266 uint32_t *flow, uint32_t *fct_flow) 283 *flow = (FLOW_CR_TX_FCEN | 0xFFFF); 296 *flow |= FLOW_CR_RX_FCEN; 264 lan7x_update_flowcontrol(struct usb_device *udev, struct ueth_data *dev, uint32_t *flow, uint32_t *fct_flow) argument
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H A D | lan78xx.c | 187 uint32_t flow = 0, fct_flow = 0; local 190 ret = lan7x_update_flowcontrol(udev, dev, &flow, &fct_flow); 197 return lan7x_write_reg(udev, FLOW, flow);
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H A D | lan7x.h | 222 uint32_t *flow, uint32_t *fct_flow);
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/u-boot/arch/arm/mach-tegra/tegra114/ |
H A D | cpu.c | 11 #include <asm/arch/flow.h> 118 struct flow_ctlr *flow = (struct flow_ctlr *)NV_PA_FLOW_BASE; local 124 clrbits_le32(&flow->cluster_control, 1);
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/u-boot/drivers/net/ |
H A D | mvpp2.c | 1693 /* Find parser flow entry */ 1694 static struct mvpp2_prs_entry *mvpp2_prs_flow_find(struct mvpp2 *priv, int flow) argument 1717 if ((bits & MVPP2_PRS_FLOW_ID_MASK) == flow) 1897 /* Default flow entries initialization for all ports */ 1911 /* Set flow ID*/ 2018 /* Generate flow in the next iteration*/ 2048 /* Generate flow in the next iteration*/ 2174 /* Generate flow in the next iteration*/ 2409 /* Set prs flow for the port */ 2433 /* Set flow I [all...] |
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